Compare commits
3 Commits
f64bf4a72d
...
415dc2fe1c
Author | SHA1 | Date | |
---|---|---|---|
415dc2fe1c | |||
432bf4d421 | |||
70dd2c9a1b |
69
lis3dh.c
69
lis3dh.c
@ -1,5 +1,6 @@
|
|||||||
#include <stddef.h>
|
#include <stddef.h>
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
#include <stdio.h>
|
||||||
#include "lis3dh.h"
|
#include "lis3dh.h"
|
||||||
#include "registers.h"
|
#include "registers.h"
|
||||||
|
|
||||||
@ -24,6 +25,7 @@ int lis3dh_init(lis3dh_t *lis3dh) {
|
|||||||
/* zero device struct */
|
/* zero device struct */
|
||||||
memset(&lis3dh->acc, 0, sizeof lis3dh->acc);
|
memset(&lis3dh->acc, 0, sizeof lis3dh->acc);
|
||||||
memset(&lis3dh->cfg, 0, sizeof lis3dh->cfg);
|
memset(&lis3dh->cfg, 0, sizeof lis3dh->cfg);
|
||||||
|
memset(&lis3dh->adc, 0, sizeof lis3dh->adc);
|
||||||
|
|
||||||
lis3dh->cfg.fifo.mode = 0xFF; /* in use if neq 0xFF */
|
lis3dh->cfg.fifo.mode = 0xFF; /* in use if neq 0xFF */
|
||||||
lis3dh->cfg.fifo.fth = 31; /* default watermark level. */
|
lis3dh->cfg.fifo.fth = 31; /* default watermark level. */
|
||||||
@ -41,9 +43,7 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
|
|||||||
uint8_t fifo_ctrl_reg, int1_cfg, int2_cfg;
|
uint8_t fifo_ctrl_reg, int1_cfg, int2_cfg;
|
||||||
uint8_t int1_ths, int2_ths, int1_dur, int2_dur;
|
uint8_t int1_ths, int2_ths, int1_dur, int2_dur;
|
||||||
uint8_t click_cfg, click_ths;
|
uint8_t click_cfg, click_ths;
|
||||||
uint8_t time_limit, time_latency, time_window;
|
uint8_t time_limit, act_ths;
|
||||||
uint8_t act_ths, act_dur;
|
|
||||||
uint8_t ref; /* dummy */
|
|
||||||
int err = 0;
|
int err = 0;
|
||||||
|
|
||||||
/* the 0x07 enables Z, Y and X axis in that order */
|
/* the 0x07 enables Z, Y and X axis in that order */
|
||||||
@ -63,10 +63,7 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
|
|||||||
click_cfg = 0;
|
click_cfg = 0;
|
||||||
click_ths = 0;
|
click_ths = 0;
|
||||||
time_limit = 0;
|
time_limit = 0;
|
||||||
time_latency = 0;
|
|
||||||
time_window = 0;
|
|
||||||
act_ths = 0;
|
act_ths = 0;
|
||||||
act_dur = 0;
|
|
||||||
ctrl_reg0 = 0;
|
ctrl_reg0 = 0;
|
||||||
temp_cfg_reg = 0;
|
temp_cfg_reg = 0;
|
||||||
|
|
||||||
@ -77,12 +74,7 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
|
|||||||
/* set time limit */
|
/* set time limit */
|
||||||
time_limit |= (lis3dh->cfg.time_limit & 0x7F);
|
time_limit |= (lis3dh->cfg.time_limit & 0x7F);
|
||||||
|
|
||||||
/* set time latency and window */
|
|
||||||
time_latency = lis3dh->cfg.time_latency;
|
|
||||||
time_window = lis3dh->cfg.time_window;
|
|
||||||
|
|
||||||
act_ths |= (lis3dh->cfg.act_ths & 0x7F);
|
act_ths |= (lis3dh->cfg.act_ths & 0x7F);
|
||||||
act_dur = lis3dh->cfg.act_dur;
|
|
||||||
|
|
||||||
/* set click config register */
|
/* set click config register */
|
||||||
click_cfg |= (lis3dh->cfg.click.xs & 1);
|
click_cfg |= (lis3dh->cfg.click.xs & 1);
|
||||||
@ -197,10 +189,10 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
|
|||||||
err |= lis3dh->dev.write(REG_CLICK_CFG, click_cfg);
|
err |= lis3dh->dev.write(REG_CLICK_CFG, click_cfg);
|
||||||
err |= lis3dh->dev.write(REG_CLICK_THS, click_ths);
|
err |= lis3dh->dev.write(REG_CLICK_THS, click_ths);
|
||||||
err |= lis3dh->dev.write(REG_TIME_LIMIT, time_limit);
|
err |= lis3dh->dev.write(REG_TIME_LIMIT, time_limit);
|
||||||
err |= lis3dh->dev.write(REG_TIME_LATENCY, time_latency);
|
err |= lis3dh->dev.write(REG_TIME_LATENCY, lis3dh->cfg.time_latency);
|
||||||
err |= lis3dh->dev.write(REG_TIME_WINDOW, time_window);
|
err |= lis3dh->dev.write(REG_TIME_WINDOW, lis3dh->cfg.time_window);
|
||||||
err |= lis3dh->dev.write(REG_ACT_THS, act_ths);
|
err |= lis3dh->dev.write(REG_ACT_THS, act_ths);
|
||||||
err |= lis3dh->dev.write(REG_ACT_DUR, act_dur);
|
err |= lis3dh->dev.write(REG_ACT_DUR, lis3dh->cfg.act_dur);
|
||||||
err |= lis3dh->dev.write(REG_TEMP_CFG_REG, temp_cfg_reg);
|
err |= lis3dh->dev.write(REG_TEMP_CFG_REG, temp_cfg_reg);
|
||||||
|
|
||||||
err |= lis3dh->dev.write(REG_CTRL_REG0, ctrl_reg0);
|
err |= lis3dh->dev.write(REG_CTRL_REG0, ctrl_reg0);
|
||||||
@ -211,10 +203,6 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
|
|||||||
err |= lis3dh->dev.write(REG_CTRL_REG5, ctrl_reg5);
|
err |= lis3dh->dev.write(REG_CTRL_REG5, ctrl_reg5);
|
||||||
err |= lis3dh->dev.write(REG_CTRL_REG6, ctrl_reg6);
|
err |= lis3dh->dev.write(REG_CTRL_REG6, ctrl_reg6);
|
||||||
|
|
||||||
|
|
||||||
/* read REFERENCE to clear internal filter struct */
|
|
||||||
err |= lis3dh->dev.read(REG_REFERENCE, &ref, 1);
|
|
||||||
|
|
||||||
/* sleep for a period TBD ~ ODR */
|
/* sleep for a period TBD ~ ODR */
|
||||||
lis3dh->dev.sleep(50000); /* 50 ms */
|
lis3dh->dev.sleep(50000); /* 50 ms */
|
||||||
return err;
|
return err;
|
||||||
@ -305,8 +293,8 @@ int lis3dh_read_fifo(lis3dh_t *lis3dh, struct lis3dh_fifo_data *fifo) {
|
|||||||
scale = 6;
|
scale = 6;
|
||||||
sens = acc_sensitivity(lis3dh->cfg.mode, lis3dh->cfg.range);
|
sens = acc_sensitivity(lis3dh->cfg.mode, lis3dh->cfg.range);
|
||||||
|
|
||||||
/* fifo buffer is max 32 */
|
/* fifo buffer is max 31 */
|
||||||
fifo->size = lis3dh->cfg.fifo.fth > 32 ? 32 : lis3dh->cfg.fifo.fth;
|
fifo->size = lis3dh->cfg.fifo.fth > 31 ? 31 : lis3dh->cfg.fifo.fth;
|
||||||
|
|
||||||
/* must set MSbit of the address to multi-read and
|
/* must set MSbit of the address to multi-read and
|
||||||
have the device auto-increment the address.
|
have the device auto-increment the address.
|
||||||
@ -353,6 +341,7 @@ int lis3dh_reference(lis3dh_t *lis3dh) {
|
|||||||
uint8_t res;
|
uint8_t res;
|
||||||
return lis3dh->dev.read(REG_REFERENCE, &res, 1);
|
return lis3dh->dev.read(REG_REFERENCE, &res, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* reset user regs and reload trim params */
|
/* reset user regs and reload trim params */
|
||||||
int lis3dh_reset(lis3dh_t *lis3dh) {
|
int lis3dh_reset(lis3dh_t *lis3dh) {
|
||||||
int err = 0;
|
int err = 0;
|
||||||
@ -385,3 +374,43 @@ int lis3dh_reset(lis3dh_t *lis3dh) {
|
|||||||
|
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* read all 3 ADCs and convert readings depending on power mode
|
||||||
|
st 1 LSb is equal to 1 millivolt */
|
||||||
|
int lis3dh_read_adc(lis3dh_t *lis3dh) {
|
||||||
|
uint8_t data[6];
|
||||||
|
int err = 0;
|
||||||
|
uint8_t shift;
|
||||||
|
float divisor;
|
||||||
|
/* read adc{1,2,3} LSB and MSB */
|
||||||
|
err |= lis3dh->dev.read(REG_OUT_ADC1_L | 0x80, data, 6);
|
||||||
|
|
||||||
|
if (lis3dh->cfg.mode == LIS3DH_MODE_LP) {
|
||||||
|
shift = 8;
|
||||||
|
divisor = 256.0;
|
||||||
|
} else {
|
||||||
|
shift = 6;
|
||||||
|
divisor = 1024.0;
|
||||||
|
}
|
||||||
|
|
||||||
|
lis3dh->adc.adc1 = 1200.0 + (400.0 * (float)(((int16_t)(data[1] | (data[0] << 8))) >> shift) / divisor);
|
||||||
|
lis3dh->adc.adc2 = 1200.0 + (400.0 * (float)(((int16_t)(data[3] | (data[2] << 8))) >> shift) / divisor);
|
||||||
|
lis3dh->adc.adc3 = 1200.0 + (400.0 * (float)(((int16_t)(data[5] | (data[4] << 8))) >> shift) / divisor);
|
||||||
|
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* the temperature sensor only reports the difference between its current temp,
|
||||||
|
and the factory calibrated temperature, 25 celsius.
|
||||||
|
in increments of plus or negative 1 unit celsius.
|
||||||
|
the reported temperature is stored inplace of adc3
|
||||||
|
temp sensing is always in 8-bit mode
|
||||||
|
operating range: -40 to 85 celsius */
|
||||||
|
int lis3dh_read_temp(lis3dh_t *lis3dh) {
|
||||||
|
uint8_t data;
|
||||||
|
int err = 0;
|
||||||
|
|
||||||
|
err |= lis3dh->dev.read(REG_OUT_ADC3_H, &data, 1);
|
||||||
|
lis3dh->adc.adc3 = (float)((int8_t)data) + 25.0;
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
25
lis3dh.h
25
lis3dh.h
@ -173,8 +173,24 @@ struct lis3dh_config {
|
|||||||
uint8_t en_temp; /* enable temp sensor on ADC 3 */
|
uint8_t en_temp; /* enable temp sensor on ADC 3 */
|
||||||
};
|
};
|
||||||
|
|
||||||
/* data read not from FIFO is put here */
|
/* reads from internal ADCs.
|
||||||
struct lis3dh_acceleration {
|
* Input range: 800 mV to 1600 mV
|
||||||
|
* Resolution:
|
||||||
|
* 8-bit in LP mode
|
||||||
|
* 10-bit in normal and in HR mode.
|
||||||
|
* Sampling frequency:
|
||||||
|
* same as ODR
|
||||||
|
* Output:
|
||||||
|
* actual value in mV
|
||||||
|
*/
|
||||||
|
struct lis3dh_adc {
|
||||||
|
float adc1;
|
||||||
|
float adc2;
|
||||||
|
float adc3;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* accel data not read from FIFO is put here */
|
||||||
|
struct lis3dh_accel {
|
||||||
float x;
|
float x;
|
||||||
float y;
|
float y;
|
||||||
float z;
|
float z;
|
||||||
@ -183,7 +199,8 @@ struct lis3dh_acceleration {
|
|||||||
struct lis3dh {
|
struct lis3dh {
|
||||||
struct lis3dh_device dev;
|
struct lis3dh_device dev;
|
||||||
struct lis3dh_config cfg;
|
struct lis3dh_config cfg;
|
||||||
struct lis3dh_acceleration acc;
|
struct lis3dh_accel acc;
|
||||||
|
struct lis3dh_adc adc;
|
||||||
};
|
};
|
||||||
|
|
||||||
typedef struct lis3dh lis3dh_t;
|
typedef struct lis3dh lis3dh_t;
|
||||||
@ -207,5 +224,7 @@ int lis3dh_clear_int1(lis3dh_t *lis3dh);
|
|||||||
int lis3dh_clear_int2(lis3dh_t *lis3dh);
|
int lis3dh_clear_int2(lis3dh_t *lis3dh);
|
||||||
int lis3dh_reference(lis3dh_t *lis3dh);
|
int lis3dh_reference(lis3dh_t *lis3dh);
|
||||||
int lis3dh_reset(lis3dh_t *lis3dh);
|
int lis3dh_reset(lis3dh_t *lis3dh);
|
||||||
|
int lis3dh_read_adc(lis3dh_t *lis3dh);
|
||||||
|
int lis3dh_read_temp(lis3dh_t *lis3dh);
|
||||||
|
|
||||||
#endif
|
#endif
|
19
main.c
19
main.c
@ -35,7 +35,6 @@ int main() {
|
|||||||
lis.dev.sleep = usleep;
|
lis.dev.sleep = usleep;
|
||||||
lis.dev.deinit = i2c_deinit;
|
lis.dev.deinit = i2c_deinit;
|
||||||
|
|
||||||
|
|
||||||
/* initialise LIS3DH struct */
|
/* initialise LIS3DH struct */
|
||||||
if (lis3dh_init(&lis)) {
|
if (lis3dh_init(&lis)) {
|
||||||
quit("init()", &lis);
|
quit("init()", &lis);
|
||||||
@ -62,6 +61,8 @@ int main() {
|
|||||||
lis.cfg.filter.mode = LIS3DH_FILTER_MODE_AUTORESET;
|
lis.cfg.filter.mode = LIS3DH_FILTER_MODE_AUTORESET;
|
||||||
lis.cfg.filter.cutoff = LIS3DH_FILTER_CUTOFF_8;
|
lis.cfg.filter.cutoff = LIS3DH_FILTER_CUTOFF_8;
|
||||||
|
|
||||||
|
lis.cfg.en_adc = 1;
|
||||||
|
lis.cfg.en_temp = 1;
|
||||||
|
|
||||||
/* write device config */
|
/* write device config */
|
||||||
if (lis3dh_configure(&lis)) {
|
if (lis3dh_configure(&lis)) {
|
||||||
@ -74,6 +75,7 @@ int main() {
|
|||||||
quit("int_poll()", &lis);
|
quit("int_poll()", &lis);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* clear latched interrupt on INT1 */
|
||||||
if (lis3dh_clear_int1(&lis)) {
|
if (lis3dh_clear_int1(&lis)) {
|
||||||
quit("clear_int1()", &lis);
|
quit("clear_int1()", &lis);
|
||||||
}
|
}
|
||||||
@ -83,10 +85,21 @@ int main() {
|
|||||||
quit("read_fifo()", &lis);
|
quit("read_fifo()", &lis);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* read ADCs */
|
||||||
|
if (lis3dh_read_adc(&lis)) {
|
||||||
|
quit("read_adc()", &lis);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* read temp from ADC3 and overwrite local ADC reading for ADC3 */
|
||||||
|
if (lis3dh_read_temp(&lis)) {
|
||||||
|
quit("read_temp()", &lis);
|
||||||
|
}
|
||||||
|
|
||||||
for(k=0; k<fifo.size; k++) {
|
for(k=0; k<fifo.size; k++) {
|
||||||
printf("%04.04f %04.04f %04.04f %04.04f\n",
|
printf("x: %04.04f y: %04.04f z: %04.04f mag: %04.04f ADC1:%.1f, ADC2:%.1f, ADC3:%.1f\n",
|
||||||
fifo.x[k], fifo.y[k], fifo.z[k],
|
fifo.x[k], fifo.y[k], fifo.z[k],
|
||||||
mag(fifo.x[k], fifo.y[k], fifo.z[k]));
|
mag(fifo.x[k], fifo.y[k], fifo.z[k]),
|
||||||
|
lis.adc.adc1, lis.adc.adc2, lis.adc.adc3);
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user