Compare commits
No commits in common. "415dc2fe1c98ea0d45ded1322c7f313002a2b78b" and "f64bf4a72d63909d3f197fc74035a2f3d7967c72" have entirely different histories.
415dc2fe1c
...
f64bf4a72d
71
lis3dh.c
71
lis3dh.c
@ -1,6 +1,5 @@
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#include <stddef.h>
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#include <stddef.h>
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#include <string.h>
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#include <string.h>
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#include <stdio.h>
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#include "lis3dh.h"
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#include "lis3dh.h"
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#include "registers.h"
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#include "registers.h"
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@ -25,7 +24,6 @@ int lis3dh_init(lis3dh_t *lis3dh) {
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/* zero device struct */
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/* zero device struct */
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memset(&lis3dh->acc, 0, sizeof lis3dh->acc);
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memset(&lis3dh->acc, 0, sizeof lis3dh->acc);
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memset(&lis3dh->cfg, 0, sizeof lis3dh->cfg);
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memset(&lis3dh->cfg, 0, sizeof lis3dh->cfg);
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memset(&lis3dh->adc, 0, sizeof lis3dh->adc);
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lis3dh->cfg.fifo.mode = 0xFF; /* in use if neq 0xFF */
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lis3dh->cfg.fifo.mode = 0xFF; /* in use if neq 0xFF */
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lis3dh->cfg.fifo.fth = 31; /* default watermark level. */
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lis3dh->cfg.fifo.fth = 31; /* default watermark level. */
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@ -43,7 +41,9 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
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uint8_t fifo_ctrl_reg, int1_cfg, int2_cfg;
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uint8_t fifo_ctrl_reg, int1_cfg, int2_cfg;
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uint8_t int1_ths, int2_ths, int1_dur, int2_dur;
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uint8_t int1_ths, int2_ths, int1_dur, int2_dur;
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uint8_t click_cfg, click_ths;
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uint8_t click_cfg, click_ths;
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uint8_t time_limit, act_ths;
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uint8_t time_limit, time_latency, time_window;
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uint8_t act_ths, act_dur;
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uint8_t ref; /* dummy */
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int err = 0;
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int err = 0;
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/* the 0x07 enables Z, Y and X axis in that order */
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/* the 0x07 enables Z, Y and X axis in that order */
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@ -63,7 +63,10 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
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click_cfg = 0;
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click_cfg = 0;
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click_ths = 0;
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click_ths = 0;
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time_limit = 0;
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time_limit = 0;
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time_latency = 0;
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time_window = 0;
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act_ths = 0;
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act_ths = 0;
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act_dur = 0;
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ctrl_reg0 = 0;
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ctrl_reg0 = 0;
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temp_cfg_reg = 0;
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temp_cfg_reg = 0;
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@ -74,7 +77,12 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
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/* set time limit */
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/* set time limit */
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time_limit |= (lis3dh->cfg.time_limit & 0x7F);
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time_limit |= (lis3dh->cfg.time_limit & 0x7F);
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/* set time latency and window */
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time_latency = lis3dh->cfg.time_latency;
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time_window = lis3dh->cfg.time_window;
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act_ths |= (lis3dh->cfg.act_ths & 0x7F);
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act_ths |= (lis3dh->cfg.act_ths & 0x7F);
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act_dur = lis3dh->cfg.act_dur;
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/* set click config register */
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/* set click config register */
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click_cfg |= (lis3dh->cfg.click.xs & 1);
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click_cfg |= (lis3dh->cfg.click.xs & 1);
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@ -189,10 +197,10 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
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err |= lis3dh->dev.write(REG_CLICK_CFG, click_cfg);
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err |= lis3dh->dev.write(REG_CLICK_CFG, click_cfg);
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err |= lis3dh->dev.write(REG_CLICK_THS, click_ths);
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err |= lis3dh->dev.write(REG_CLICK_THS, click_ths);
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err |= lis3dh->dev.write(REG_TIME_LIMIT, time_limit);
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err |= lis3dh->dev.write(REG_TIME_LIMIT, time_limit);
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err |= lis3dh->dev.write(REG_TIME_LATENCY, lis3dh->cfg.time_latency);
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err |= lis3dh->dev.write(REG_TIME_LATENCY, time_latency);
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err |= lis3dh->dev.write(REG_TIME_WINDOW, lis3dh->cfg.time_window);
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err |= lis3dh->dev.write(REG_TIME_WINDOW, time_window);
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err |= lis3dh->dev.write(REG_ACT_THS, act_ths);
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err |= lis3dh->dev.write(REG_ACT_THS, act_ths);
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err |= lis3dh->dev.write(REG_ACT_DUR, lis3dh->cfg.act_dur);
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err |= lis3dh->dev.write(REG_ACT_DUR, act_dur);
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err |= lis3dh->dev.write(REG_TEMP_CFG_REG, temp_cfg_reg);
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err |= lis3dh->dev.write(REG_TEMP_CFG_REG, temp_cfg_reg);
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err |= lis3dh->dev.write(REG_CTRL_REG0, ctrl_reg0);
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err |= lis3dh->dev.write(REG_CTRL_REG0, ctrl_reg0);
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@ -203,6 +211,10 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
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err |= lis3dh->dev.write(REG_CTRL_REG5, ctrl_reg5);
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err |= lis3dh->dev.write(REG_CTRL_REG5, ctrl_reg5);
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err |= lis3dh->dev.write(REG_CTRL_REG6, ctrl_reg6);
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err |= lis3dh->dev.write(REG_CTRL_REG6, ctrl_reg6);
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/* read REFERENCE to clear internal filter struct */
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err |= lis3dh->dev.read(REG_REFERENCE, &ref, 1);
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/* sleep for a period TBD ~ ODR */
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/* sleep for a period TBD ~ ODR */
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lis3dh->dev.sleep(50000); /* 50 ms */
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lis3dh->dev.sleep(50000); /* 50 ms */
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return err;
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return err;
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@ -293,8 +305,8 @@ int lis3dh_read_fifo(lis3dh_t *lis3dh, struct lis3dh_fifo_data *fifo) {
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scale = 6;
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scale = 6;
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sens = acc_sensitivity(lis3dh->cfg.mode, lis3dh->cfg.range);
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sens = acc_sensitivity(lis3dh->cfg.mode, lis3dh->cfg.range);
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/* fifo buffer is max 31 */
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/* fifo buffer is max 32 */
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fifo->size = lis3dh->cfg.fifo.fth > 31 ? 31 : lis3dh->cfg.fifo.fth;
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fifo->size = lis3dh->cfg.fifo.fth > 32 ? 32 : lis3dh->cfg.fifo.fth;
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/* must set MSbit of the address to multi-read and
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/* must set MSbit of the address to multi-read and
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have the device auto-increment the address.
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have the device auto-increment the address.
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@ -341,7 +353,6 @@ int lis3dh_reference(lis3dh_t *lis3dh) {
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uint8_t res;
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uint8_t res;
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return lis3dh->dev.read(REG_REFERENCE, &res, 1);
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return lis3dh->dev.read(REG_REFERENCE, &res, 1);
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}
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}
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/* reset user regs and reload trim params */
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/* reset user regs and reload trim params */
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int lis3dh_reset(lis3dh_t *lis3dh) {
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int lis3dh_reset(lis3dh_t *lis3dh) {
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int err = 0;
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int err = 0;
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@ -373,44 +384,4 @@ int lis3dh_reset(lis3dh_t *lis3dh) {
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err |= lis3dh->dev.write(REG_ACT_DUR, 0x00);
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err |= lis3dh->dev.write(REG_ACT_DUR, 0x00);
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return err;
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return err;
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}
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}
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/* read all 3 ADCs and convert readings depending on power mode
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st 1 LSb is equal to 1 millivolt */
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int lis3dh_read_adc(lis3dh_t *lis3dh) {
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uint8_t data[6];
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int err = 0;
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uint8_t shift;
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float divisor;
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/* read adc{1,2,3} LSB and MSB */
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err |= lis3dh->dev.read(REG_OUT_ADC1_L | 0x80, data, 6);
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if (lis3dh->cfg.mode == LIS3DH_MODE_LP) {
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shift = 8;
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divisor = 256.0;
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} else {
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shift = 6;
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divisor = 1024.0;
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}
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lis3dh->adc.adc1 = 1200.0 + (400.0 * (float)(((int16_t)(data[1] | (data[0] << 8))) >> shift) / divisor);
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lis3dh->adc.adc2 = 1200.0 + (400.0 * (float)(((int16_t)(data[3] | (data[2] << 8))) >> shift) / divisor);
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lis3dh->adc.adc3 = 1200.0 + (400.0 * (float)(((int16_t)(data[5] | (data[4] << 8))) >> shift) / divisor);
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return err;
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}
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/* the temperature sensor only reports the difference between its current temp,
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and the factory calibrated temperature, 25 celsius.
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in increments of plus or negative 1 unit celsius.
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the reported temperature is stored inplace of adc3
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temp sensing is always in 8-bit mode
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operating range: -40 to 85 celsius */
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int lis3dh_read_temp(lis3dh_t *lis3dh) {
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uint8_t data;
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int err = 0;
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err |= lis3dh->dev.read(REG_OUT_ADC3_H, &data, 1);
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lis3dh->adc.adc3 = (float)((int8_t)data) + 25.0;
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return err;
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}
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25
lis3dh.h
25
lis3dh.h
@ -173,24 +173,8 @@ struct lis3dh_config {
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uint8_t en_temp; /* enable temp sensor on ADC 3 */
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uint8_t en_temp; /* enable temp sensor on ADC 3 */
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};
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};
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/* reads from internal ADCs.
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/* data read not from FIFO is put here */
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* Input range: 800 mV to 1600 mV
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struct lis3dh_acceleration {
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* Resolution:
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* 8-bit in LP mode
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* 10-bit in normal and in HR mode.
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* Sampling frequency:
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* same as ODR
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* Output:
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* actual value in mV
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*/
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struct lis3dh_adc {
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float adc1;
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float adc2;
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float adc3;
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};
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/* accel data not read from FIFO is put here */
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struct lis3dh_accel {
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float x;
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float x;
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float y;
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float y;
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float z;
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float z;
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@ -199,8 +183,7 @@ struct lis3dh_accel {
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struct lis3dh {
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struct lis3dh {
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struct lis3dh_device dev;
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struct lis3dh_device dev;
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struct lis3dh_config cfg;
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struct lis3dh_config cfg;
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struct lis3dh_accel acc;
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struct lis3dh_acceleration acc;
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struct lis3dh_adc adc;
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};
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};
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typedef struct lis3dh lis3dh_t;
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typedef struct lis3dh lis3dh_t;
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@ -224,7 +207,5 @@ int lis3dh_clear_int1(lis3dh_t *lis3dh);
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int lis3dh_clear_int2(lis3dh_t *lis3dh);
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int lis3dh_clear_int2(lis3dh_t *lis3dh);
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int lis3dh_reference(lis3dh_t *lis3dh);
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int lis3dh_reference(lis3dh_t *lis3dh);
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int lis3dh_reset(lis3dh_t *lis3dh);
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int lis3dh_reset(lis3dh_t *lis3dh);
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int lis3dh_read_adc(lis3dh_t *lis3dh);
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int lis3dh_read_temp(lis3dh_t *lis3dh);
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#endif
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#endif
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23
main.c
23
main.c
@ -35,6 +35,7 @@ int main() {
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lis.dev.sleep = usleep;
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lis.dev.sleep = usleep;
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lis.dev.deinit = i2c_deinit;
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lis.dev.deinit = i2c_deinit;
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/* initialise LIS3DH struct */
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/* initialise LIS3DH struct */
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if (lis3dh_init(&lis)) {
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if (lis3dh_init(&lis)) {
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quit("init()", &lis);
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quit("init()", &lis);
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@ -60,22 +61,19 @@ int main() {
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lis.cfg.pin1.latch = 1;
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lis.cfg.pin1.latch = 1;
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lis.cfg.filter.mode = LIS3DH_FILTER_MODE_AUTORESET;
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lis.cfg.filter.mode = LIS3DH_FILTER_MODE_AUTORESET;
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lis.cfg.filter.cutoff = LIS3DH_FILTER_CUTOFF_8;
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lis.cfg.filter.cutoff = LIS3DH_FILTER_CUTOFF_8;
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lis.cfg.en_adc = 1;
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lis.cfg.en_temp = 1;
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/* write device config */
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/* write device config */
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if (lis3dh_configure(&lis)) {
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if (lis3dh_configure(&lis)) {
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quit("configure()", &lis);
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quit("configure()", &lis);
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}
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}
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for(i=0; i<50; i++) {
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for(i=0; i<50; i++) {
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/* wait for interrupt from LIS3DH */
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/* wait for interrupt from LIS3DH */
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if (int_poll(GPIO_INTERRUPT_PIN_INT1)) {
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if (int_poll(GPIO_INTERRUPT_PIN_INT1)) {
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quit("int_poll()", &lis);
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quit("int_poll()", &lis);
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}
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}
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/* clear latched interrupt on INT1 */
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if (lis3dh_clear_int1(&lis)) {
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if (lis3dh_clear_int1(&lis)) {
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quit("clear_int1()", &lis);
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quit("clear_int1()", &lis);
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}
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}
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@ -85,21 +83,10 @@ int main() {
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quit("read_fifo()", &lis);
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quit("read_fifo()", &lis);
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}
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}
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/* read ADCs */
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if (lis3dh_read_adc(&lis)) {
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quit("read_adc()", &lis);
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}
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/* read temp from ADC3 and overwrite local ADC reading for ADC3 */
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if (lis3dh_read_temp(&lis)) {
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quit("read_temp()", &lis);
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}
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for(k=0; k<fifo.size; k++) {
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for(k=0; k<fifo.size; k++) {
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printf("x: %04.04f y: %04.04f z: %04.04f mag: %04.04f ADC1:%.1f, ADC2:%.1f, ADC3:%.1f\n",
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printf("%04.04f %04.04f %04.04f %04.04f\n",
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fifo.x[k], fifo.y[k], fifo.z[k],
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fifo.x[k], fifo.y[k], fifo.z[k],
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mag(fifo.x[k], fifo.y[k], fifo.z[k]),
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mag(fifo.x[k], fifo.y[k], fifo.z[k]));
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lis.adc.adc1, lis.adc.adc2, lis.adc.adc3);
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}
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}
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}
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}
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Reference in New Issue
Block a user