|
3b3b00a9f8
|
working on SPI
|
2024-01-04 14:37:44 +00:00 |
|
|
1a29e35097
|
rewrite macros and user configurable REFERENCE
|
2024-01-02 14:42:49 +00:00 |
|
|
b0528ff456
|
inertial wakeup
|
2024-01-02 10:56:58 +00:00 |
|
|
50a491a1be
|
double click
|
2024-01-01 13:08:06 +00:00 |
|
|
d1ab5a8d99
|
more src reg interaction
|
2024-01-01 10:15:57 +00:00 |
|
|
6352a65fec
|
INT dur table
|
2023-12-31 22:31:22 +00:00 |
|
|
432bf4d421
|
temperature
|
2023-12-31 15:41:24 +00:00 |
|
|
70dd2c9a1b
|
ADC
|
2023-12-31 15:24:40 +00:00 |
|
|
f64bf4a72d
|
all registers
|
2023-12-31 14:14:12 +00:00 |
|
|
16b40de1e1
|
lis3dh_reset() and bit fiddle to prevent overwriting regs in case of user issue
|
2023-12-30 20:22:29 +00:00 |
|
|
cf48f7db54
|
INT1 and INT2 config
|
2023-12-30 16:23:25 +00:00 |
|
|
87dd035d9e
|
int to int_pin rename to avoid confusion with int regs
|
2023-12-30 15:36:35 +00:00 |
|
|
365bb369bb
|
memset() and comments
|
2023-12-29 23:42:15 +00:00 |
|
|
9c3f912d1a
|
read REFERENCE
|
2023-12-29 18:19:11 +00:00 |
|
|
84e6fa4caa
|
latch interrupts + fn to clear on device
|
2023-12-29 17:26:54 +00:00 |
|
|
b0907115c2
|
rename {pin1,pin2} => {int1,int2}
|
2023-12-28 18:15:25 +00:00 |
|
|
c979a449cf
|
Pin config for IRQ
|
2023-12-23 18:38:28 +00:00 |
|
|
5d3d1437f9
|
c99 + comments
|
2023-12-23 13:31:59 +00:00 |
|
|
11e6e65c6f
|
change to float and remove unused h
|
2023-12-23 10:33:28 +00:00 |
|
|
e9472ed1f0
|
pass FIFO data
|
2023-12-23 10:28:43 +00:00 |
|
|
a5b704fbfe
|
filter: decently filter out DC/constant acceleration
|
2023-12-22 17:00:53 +00:00 |
|
|
9ae2d4ce01
|
fix: device would sometimes corrupt its own registers.
|
2023-12-22 16:25:25 +00:00 |
|
|
0dff0b92c3
|
FIFO
|
2023-12-22 10:22:43 +00:00 |
|
|
31bcd4d12f
|
tidying
|
2023-12-22 08:26:10 +00:00 |
|
|
509bae290b
|
working simple example
|
2023-12-21 23:29:22 +00:00 |
|
|
1726159cb8
|
.
|
2023-12-21 18:17:20 +00:00 |
|
|
e25f035863
|
work on C implementation
|
2023-12-21 17:31:12 +00:00 |
|