2023-12-21 17:31:12 +00:00
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#ifndef LIS3DH_H
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#define LIS3DH_H
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#include <stdint.h>
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2024-01-01 10:15:57 +00:00
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/* macros for checking INT_SRC registers upon interrupt */
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2024-01-02 14:42:49 +00:00
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#define LIS3DH_INT_SRC_X_LOW(c) (!!(c & 0x01)) /* X axis low */
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#define LIS3DH_INT_SRC_X_HIGH(c) (!!(c & 0x02)) /* X axis high */
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#define LIS3DH_INT_SRC_Y_LOW(c) (!!(c & 0x04)) /* Y axis low */
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#define LIS3DH_INT_SRC_Y_HIGH(c) (!!(c & 0x08)) /* Y axis high */
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#define LIS3DH_INT_SRC_Z_LOW(c) (!!(c & 0x10)) /* Z axis low */
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#define LIS3DH_INT_SRC_Z_HIGH(c) (!!(c & 0x20)) /* Z axis high */
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#define LIS3DH_INT_SRC_IA(c) (!!(c & 0x40)) /* Interrupt active */
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2024-01-01 10:15:57 +00:00
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/* macros for checking CLICK_SRC register upon interrupt */
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2024-01-02 14:42:49 +00:00
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#define LIS3DH_CLICK_SRC_X(c) (!!(c & 0x01)) /* X high event */
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#define LIS3DH_CLICK_SRC_Y(c) (!!(c & 0x02)) /* Y high event */
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#define LIS3DH_CLICK_SRC_Z(c) (!!(c & 0x04)) /* Z high event */
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#define LIS3DH_CLICK_SIGN(c) (!!(c & 0x08)) /* Click sign, 1 = positive */
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#define LIS3DH_CLICK_SCLICK(c) (!!(c & 0x10)) /* Single-click det. enabled */
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#define LIS3DH_CLICK_DCLICK(c) (!!(c & 0x20)) /* Double-click det. enabled */
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2024-01-01 10:15:57 +00:00
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2024-01-06 16:51:22 +00:00
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/* macros for checking FIFO_SRC register */
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#define LIS3DH_FIFO_SRC_UNREAD(c) (c & 0x1F) /* FSS / current unread samples in FIFO */
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#define LIS3DH_FIFO_SRC_EMPTY(c) (!!(c & 0x20)) /* FIFO is empty */
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#define LIS3DH_FIFO_SRC_OVRN(c) (!!(c & 0x40)) /* FIFO has overrun (full 32) */
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#define LIS3DH_FIFO_SRC_WTM(c) (!!(c & 0x80)) /* FIFO watermark hit (not full 32) */
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/* macros for checking STATUS register */
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#define LIS3DH_STATUS_XDA(c) (!!(c & 0x01)) /* X-axis data available */
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#define LIS3DH_STATUS_YDA(c) (!!(c & 0x02)) /* Y-axis data available */
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#define LIS3DH_STATUS_ZDA(c) (!!(c & 0x04)) /* Z-axis data available */
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#define LIS3DH_STATUS_ZYXDA(c) (!!(c & 0x08)) /* {Z,Y,X}-axis data available */
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#define LIS3DH_STATUS_XOR(c) (!!(c & 0x10)) /* X-axis data has overrun (been overwritten) */
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#define LIS3DH_STATUS_YOR(c) (!!(c & 0x20)) /* Y-axis data has overrun (been overwritten) */
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#define LIS3DH_STATUS_ZOR(c) (!!(c & 0x40)) /* Z-axis data has overrun (been overwritten) */
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#define LIS3DH_STATUS_ZYXOR(c) (!!(c & 0x80)) /* {Z,Y,X}-axis data has overrun (been overwritten) */
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2024-01-07 17:54:56 +00:00
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2023-12-21 18:17:20 +00:00
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/* rates */
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2023-12-30 16:23:25 +00:00
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/* all power modes */
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2023-12-23 13:31:59 +00:00
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#define LIS3DH_ODR_POWEROFF 0x00
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#define LIS3DH_ODR_1_HZ 0x01
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#define LIS3DH_ODR_10_HZ 0x02
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#define LIS3DH_ODR_25_HZ 0x03
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#define LIS3DH_ODR_50_HZ 0x04
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#define LIS3DH_ODR_100_HZ 0x05
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#define LIS3DH_ODR_200_HZ 0x06
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#define LIS3DH_ODR_400_HZ 0x07
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2023-12-30 16:23:25 +00:00
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/* only normal mode */
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2023-12-23 13:31:59 +00:00
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#define LIS3DH_ODR_NORM_1344_HZ 0x09
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2023-12-30 16:23:25 +00:00
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/* only low-power mode */
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2023-12-23 13:31:59 +00:00
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#define LIS3DH_ODR_LP_1600_HZ 0x08
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#define LIS3DH_ODR_LP_5376_HZ 0x09
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2023-12-21 17:31:12 +00:00
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2024-01-07 17:54:56 +00:00
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2023-12-21 17:31:12 +00:00
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/* range/sens */
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2024-01-06 23:28:58 +00:00
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#define LIS3DH_FS_2G 0x00 /* Full-scale sensing range: ± 2G */
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#define LIS3DH_FS_4G 0x01 /* Full-scale sensing range: ± 4G */
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#define LIS3DH_FS_8G 0x02 /* Full-scale sensing range: ± 8G */
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#define LIS3DH_FS_16G 0x03 /* Full-scale sensing range: ± 16G */
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2023-12-21 23:29:22 +00:00
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2024-01-07 17:54:56 +00:00
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2023-12-22 10:22:43 +00:00
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/* operating modes */
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2024-01-06 23:28:58 +00:00
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#define LIS3DH_MODE_HR 0x00 /* High resolution: 12-bit */
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#define LIS3DH_MODE_LP 0x01 /* Low-power: 8-bit */
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#define LIS3DH_MODE_NORMAL 0x02 /* Normal: 10-bit */
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2023-12-21 17:31:12 +00:00
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2024-01-07 17:54:56 +00:00
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2023-12-22 10:22:43 +00:00
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/* FIFO modes */
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2024-01-06 23:28:58 +00:00
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/* FIFO is not operational, and the buffer is reset. Must be used for switching FIFO modes */
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#define LIS3DH_FIFO_MODE_BYPASS 0x00
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/* Once FIFO fills up completely, it must be reset to be used again */
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#define LIS3DH_FIFO_MODE_FIFO 0x01
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/* Continously (over)writes buffer until it is read */
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#define LIS3DH_FIFO_MODE_STREAM 0x02
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/* Stream mode, but automatically switches to FIFO mode once a set interrupt has occurred */
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2023-12-23 13:31:59 +00:00
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#define LIS3DH_FIFO_MODE_STREAM_TO_FIFO 0x03
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2023-12-22 10:22:43 +00:00
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/* FIFO trigger pin selection */
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2023-12-23 13:31:59 +00:00
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#define LIS3DH_FIFO_TRIG_INT1 0x00
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#define LIS3DH_FIFO_TRIG_INT2 0x01
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2023-12-21 17:31:12 +00:00
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2024-01-07 17:54:56 +00:00
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2024-01-01 10:15:57 +00:00
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/* Reference mode
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* Output [x y z] data is calculated as the difference between the
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* measured acceleration and the value stored in REFERENCE.
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* signed 7-bit int, 1 LSb value depends on FS.
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* FS_2G: ~ 16mg per 1 LSb
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* FS_4G: ~ 31mg per 1 LSb
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* FS_8G: ~ 63mg per 1 LSb
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2024-01-07 17:54:56 +00:00
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* FS_16G: ~127mg per 1 LSb */
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2024-01-01 10:15:57 +00:00
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#define LIS3DH_FILTER_MODE_REFERENCE 0x01
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2024-01-07 17:54:56 +00:00
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2024-01-01 10:15:57 +00:00
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/* Normal mode
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2024-01-07 17:54:56 +00:00
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* Probably the same as 0x00 */
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2024-01-01 10:15:57 +00:00
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#define LIS3DH_FILTER_MODE_NORMAL 0x02
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2024-01-07 17:54:56 +00:00
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2024-01-01 10:15:57 +00:00
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/* Autoreset mode
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* The filter is automatically reset upon configured interrupt event.
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2024-01-07 17:54:56 +00:00
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* It can be reset at any time by reading REFERENCE. */
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2024-01-01 10:15:57 +00:00
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#define LIS3DH_FILTER_MODE_AUTORESET 0x03
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2023-12-22 17:00:53 +00:00
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2024-01-07 17:54:56 +00:00
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2023-12-22 17:00:53 +00:00
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/* filter cutoff */
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/* unfortunately, there is only a table for low-power mode,
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2024-01-07 17:54:56 +00:00
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* and the actual cutoff-frequency depends on the ODR.
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* Naming scheme after ODR@400Hz
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* AN3308 > section 4.3.1.1 */
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2023-12-23 13:31:59 +00:00
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#define LIS3DH_FILTER_CUTOFF_8 0x00 /* highest freq */
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#define LIS3DH_FILTER_CUTOFF_4 0x01
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#define LIS3DH_FILTER_CUTOFF_2 0x02
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#define LIS3DH_FILTER_CUTOFF_1 0x03 /* lowest freq */
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2023-12-22 17:00:53 +00:00
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2024-01-08 06:16:29 +00:00
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/* Positive and negative axis self-test */
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#define LIS3DH_SELF_TEST_0 0x01
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#define LIS3DH_SELF_TEST_1 0x02
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2023-12-22 17:00:53 +00:00
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2024-01-07 17:54:56 +00:00
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/* Note: IA{1,2} is interrupt activity {1,2} or interrupt generators */
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2023-12-29 23:42:15 +00:00
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/* user provided functions, init and deinit can be set to NULL and won't be used */
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2023-12-21 17:31:12 +00:00
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struct lis3dh_device {
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2024-01-06 17:19:24 +00:00
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int (*init)(void);
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int (*read)(uint8_t reg, uint8_t *dst, uint32_t size);
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int (*write)(uint8_t reg, uint8_t value);
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int (*sleep)(uint32_t dur_us);
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int (*deinit)(void);
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2023-12-21 17:31:12 +00:00
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};
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2023-12-31 14:14:12 +00:00
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struct lis3dh_click_config {
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uint8_t zd; /* double click interrupt on Z-axis */
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uint8_t zs; /* single click interrupt on Z-axis */
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uint8_t yd; /* double click interrupt on Y-axis */
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uint8_t ys; /* single click interrupt on Y-axis */
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uint8_t xd; /* double click interrupt on X-axis */
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uint8_t xs; /* single click interrupt on X-axis */
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uint8_t latch; /* active until CLICK_SRC is read */
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};
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2023-12-30 16:23:25 +00:00
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/* INT1_CFG and INT2_CFG have identical struct */
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struct lis3dh_int_config {
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uint8_t aoi; /* AND/OR combination of int events */
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2023-12-31 14:14:12 +00:00
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uint8_t en_6d; /* 6 direction detection */
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uint8_t en_4d; /* both en_6d and en_4d must = 1 for 4D to work ! */
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2023-12-30 16:23:25 +00:00
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uint8_t zh; /* interrupt generation on Z high event / Dir. recog. */
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uint8_t zl; /* interrupt generation on Z low event / Dir. recog. */
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uint8_t yh; /* interrupt generation on Y high event / Dir. recog. */
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uint8_t yl; /* interrupt generation on Y low event / Dir. recog. */
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uint8_t xh; /* interrupt generation on X high event / Dir. recog. */
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uint8_t xl; /* interrupt generation on X low event / Dir. recog. */
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2024-01-02 10:56:58 +00:00
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uint8_t latch; /* active until INT1_SRC/INT2_SRC is read */
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2023-12-30 16:23:25 +00:00
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};
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2024-01-02 14:42:49 +00:00
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/* config for interrupt output pin #2 */
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2023-12-30 15:36:35 +00:00
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struct lis3dh_int_pin2_config {
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2023-12-23 18:38:28 +00:00
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uint8_t click; /* CLICK interrupt */
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uint8_t ia1; /* IA1 interrupt */
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uint8_t ia2; /* IA2 interrupt */
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uint8_t boot; /* enable BOOT on pin 2 */
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uint8_t act; /* interrupt on activity */
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uint8_t polarity; /* INT1 & INT2 polarity. 0 active high, 1 active low */
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};
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2024-01-02 14:42:49 +00:00
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/* config for interrupt output pin #1 */
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2023-12-30 15:36:35 +00:00
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struct lis3dh_int_pin1_config {
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2023-12-23 18:38:28 +00:00
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uint8_t click; /* CLICK interrupt */
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uint8_t ia1; /* IA1 interrupt */
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uint8_t ia2; /* IA2 interrupt */
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uint8_t drdy_zyxda; /* new [xyz] data ready (not via FIFO) */
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uint8_t drdy_321; /* not sure */
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uint8_t wtm; /* FIFO reached watermark level */
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uint8_t overrun; /* FIFO has overrun */
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};
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2023-12-29 23:42:15 +00:00
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/* config for high-pass filter */
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2023-12-22 17:00:53 +00:00
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struct lis3dh_filter_config {
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2023-12-23 18:38:28 +00:00
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uint8_t mode; /* filter mode, reset behaviour */
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uint8_t cutoff; /* high-pass filter cutoff freq (~ ODR) */
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uint8_t fds; /* ¬(bypass filter) */
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uint8_t click; /* enable filter for CLICK function */
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uint8_t ia2; /* enable filter for AOI func on INT 2 */
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uint8_t ia1; /* enable filter for AOI func on INT 1 */
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2023-12-22 17:00:53 +00:00
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};
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2023-12-29 23:42:15 +00:00
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/* config for FIFO */
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2023-12-22 10:22:43 +00:00
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struct lis3dh_fifo_config {
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2024-01-05 20:32:03 +00:00
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uint8_t size; /* size of fifo; 0-32; 0=don't use. fth=[1-32]-1 (index) */
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2023-12-23 18:38:28 +00:00
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uint8_t trig; /* pin to trigger when watermark/overrun occurs */
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uint8_t mode; /* FIFO mode */
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2023-12-22 10:22:43 +00:00
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};
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2023-12-21 17:31:12 +00:00
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struct lis3dh_config {
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uint8_t rate; /* ODR */
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uint8_t range; /* FS */
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2023-12-21 23:29:22 +00:00
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uint8_t mode; /* LPen and HR */
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2023-12-30 16:23:25 +00:00
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struct lis3dh_fifo_config fifo;
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struct lis3dh_filter_config filter;
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2023-12-31 14:14:12 +00:00
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struct lis3dh_int_pin1_config pin1;
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struct lis3dh_int_pin2_config pin2;
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struct lis3dh_int_config int1;
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struct lis3dh_int_config int2;
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struct lis3dh_click_config click;
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2023-12-30 16:23:25 +00:00
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/* 1 LSb = 16 mg @ FS_2G
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* 1 LSb = 32 mg @ FS_4G
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* 1 LSb = 62 mg @ FS_8G
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* 1 LSb = 186 mg @ FS_16G
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*/
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uint8_t int1_ths; /* 7-bit INT 1 threshold value */
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uint8_t int2_ths; /* 7-bit INT 2 threshold value */
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2023-12-31 14:14:12 +00:00
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uint8_t click_ths; /* 7-bit CLICK threshold value */
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uint8_t act_ths; /* 7-bit ACT threshold value */
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2023-12-30 16:23:25 +00:00
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/* Duration time is measured in N/ODR where:
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* --- N = The content of the intX_dur integer
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* --- ODR = the data rate, eg 100, 400...
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2023-12-31 22:31:22 +00:00
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* [ODR] [1 LSb in milliseconds]
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* 1 1000
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* 10 100
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* 25 40
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* 50 20
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* 100 10
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* 200 5
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* 400 2.5
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* 1600 0.6
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* 1344 0.744
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* 5376 0.186
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2024-01-01 13:08:06 +00:00
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* (Note: this calc also applies to:
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* - time_limit
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* - time_window
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* - time_latency
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* used in CLICK)
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2024-01-08 06:16:29 +00:00
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*
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* this is the "1[LSb]" in act_dur calc
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2023-12-30 16:23:25 +00:00
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*/
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uint8_t int1_dur; /* 7-bit INT 1 duration value */
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uint8_t int2_dur; /* 7-bit INT 2 duration value */
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2023-12-31 14:14:12 +00:00
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/* Sleep-to-wake and return-to-sleep duration
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* 1 LSb = (8 * 1[LSb] + 1) / ODR
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*/
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uint8_t act_dur; /* 8-bit ACT duration value */
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uint8_t time_limit; /* 7-bit time limit ~ CLICK */
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uint8_t time_latency; /* 8-bit time latency ~ CLICK */
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uint8_t time_window; /* 8-bit time window ~ CLICK */
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uint8_t sdo_pullup; /* Use pull-up on SDO. default 0 use */
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uint8_t en_adc; /* enable ADC */
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|
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uint8_t en_temp; /* enable temp sensor on ADC 3 */
|
2024-01-08 06:16:29 +00:00
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uint8_t spi3w; /* set to 1 to enable 3-way SPI, default 0 */
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uint8_t self_test; /* set self-test mode */
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2024-01-02 14:42:49 +00:00
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uint8_t reference; /* HP filter reference */
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2023-12-21 23:29:22 +00:00
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};
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|
2023-12-31 15:24:40 +00:00
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/* reads from internal ADCs.
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* Input range: 800 mV to 1600 mV
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* Resolution:
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|
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* 8-bit in LP mode
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* 10-bit in normal and in HR mode.
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* Sampling frequency:
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|
|
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* same as ODR
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* Output:
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|
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* actual value in mV
|
2024-01-04 19:54:13 +00:00
|
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* 1 lsb = 1 mv
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|
|
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* Temperature:
|
|
|
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* 1 lsb = 1 deg C
|
2023-12-31 15:24:40 +00:00
|
|
|
*/
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|
|
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struct lis3dh_adc {
|
2024-01-04 19:54:13 +00:00
|
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int16_t adc1;
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|
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int16_t adc2;
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|
|
|
int16_t adc3;
|
2023-12-31 15:24:40 +00:00
|
|
|
};
|
|
|
|
|
2024-01-04 20:20:51 +00:00
|
|
|
/* accel data read not using FIFO */
|
|
|
|
/* 1 lsb = 1 mg */
|
2023-12-31 15:24:40 +00:00
|
|
|
struct lis3dh_accel {
|
2024-01-04 20:20:51 +00:00
|
|
|
int16_t x;
|
|
|
|
int16_t y;
|
|
|
|
int16_t z;
|
2023-12-21 17:31:12 +00:00
|
|
|
};
|
|
|
|
|
2024-01-01 10:15:57 +00:00
|
|
|
/* stores interrupt source registers read from the device */
|
2024-01-04 14:37:44 +00:00
|
|
|
struct lis3dh_int_src {
|
2024-01-01 10:15:57 +00:00
|
|
|
uint8_t int1;
|
|
|
|
uint8_t int2;
|
|
|
|
uint8_t click;
|
|
|
|
};
|
|
|
|
|
2023-12-21 17:31:12 +00:00
|
|
|
struct lis3dh {
|
2024-01-04 14:37:44 +00:00
|
|
|
struct lis3dh_device dev; /* fn ptrs to interface w/ device */
|
|
|
|
struct lis3dh_config cfg; /* config variables to write to device */
|
|
|
|
struct lis3dh_accel acc; /* accel data read from device (not FIFO) */
|
|
|
|
struct lis3dh_adc adc; /* adc and optionally temp read from device */
|
|
|
|
struct lis3dh_int_src src; /* INT_SRC registers read from device */
|
2023-12-21 17:31:12 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
typedef struct lis3dh lis3dh_t;
|
|
|
|
|
2023-12-23 10:28:43 +00:00
|
|
|
/* struct for containing the FIFO data */
|
2024-01-04 20:20:51 +00:00
|
|
|
/* 1 lsb = 1 mg */
|
2023-12-23 10:28:43 +00:00
|
|
|
struct lis3dh_fifo_data {
|
2024-01-06 17:49:36 +00:00
|
|
|
uint8_t size; /* up to 31 */
|
2024-01-04 20:20:51 +00:00
|
|
|
int16_t x[32];
|
|
|
|
int16_t y[32];
|
|
|
|
int16_t z[32];
|
2023-12-23 10:28:43 +00:00
|
|
|
};
|
|
|
|
|
2023-12-21 17:31:12 +00:00
|
|
|
int lis3dh_init(lis3dh_t *lis3dh);
|
|
|
|
int lis3dh_deinit(lis3dh_t *lis3dh);
|
2023-12-21 23:29:22 +00:00
|
|
|
int lis3dh_configure(lis3dh_t *lis3dh);
|
|
|
|
int lis3dh_read(lis3dh_t *lis3dh);
|
2023-12-23 10:28:43 +00:00
|
|
|
int lis3dh_read_fifo(lis3dh_t *lis3dh, struct lis3dh_fifo_data *fifo);
|
2024-01-01 10:15:57 +00:00
|
|
|
int lis3dh_read_int1(lis3dh_t *lis3dh);
|
|
|
|
int lis3dh_read_int2(lis3dh_t *lis3dh);
|
|
|
|
int lis3dh_read_click(lis3dh_t *lis3dh);
|
2023-12-29 18:19:11 +00:00
|
|
|
int lis3dh_reference(lis3dh_t *lis3dh);
|
2023-12-30 20:22:29 +00:00
|
|
|
int lis3dh_reset(lis3dh_t *lis3dh);
|
2023-12-31 15:24:40 +00:00
|
|
|
int lis3dh_read_adc(lis3dh_t *lis3dh);
|
2023-12-31 15:41:24 +00:00
|
|
|
int lis3dh_read_temp(lis3dh_t *lis3dh);
|
2024-01-06 23:28:58 +00:00
|
|
|
int lis3dh_fifo_reset(lis3dh_t *lis3dh);
|
2023-12-23 10:28:43 +00:00
|
|
|
|
2023-12-21 17:31:12 +00:00
|
|
|
#endif
|