As sent to C Garret et all in reply to

circuits for analysis email.
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Robin Clark 2011-10-07 18:09:02 +01:00
parent bce469f339
commit cbc38e69f3
2 changed files with 28 additions and 16 deletions

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@ -21,10 +21,12 @@
\begin{abstract}
Circuits from email conversation.
Not a document to be proof read.
Proof of analysis concept.
Function fm() applied to a component returns its failure modes.
Function $fm$ applied to a component returns its failure modes.
\end{abstract}
\clearpage
\section{Op-Amp circuit 1}
@ -39,7 +41,7 @@ Function fm() applied to a component returns its failure modes.
The amplifier in figure~\ref{fig:circuit1} amplifies the difference between
the voltages $+V1$ and $+V2$.
the input voltages $+V1$ and $+V2$.
It would be desirable to represent this circuit as a derived component called say $DiffAMP$.
We begin by identifying functional groups from the components in the circuit.
@ -47,7 +49,7 @@ We begin by identifying functional groups from the components in the circuit.
\subsection{Functional Group: Potential Divider}
R1 and R2 perform as a potential divider.
Resistors can fail OPEN and SHORT.
Resistors can fail OPEN and SHORT (according to GAS burner standard EN298 Appendix A).
$$ fm(R) = \{ OPEN, SHORT \}$$
@ -71,18 +73,18 @@ $$ fm(R) = \{ OPEN, SHORT \}$$
\label{tbl:pdfmea}
\end{table}
By collecting the symptoms in table~ref{tbl:pdfmea} we can create a derived
By collecting the symptoms in table~\ref{tbl:pdfmea} we can create a derived
component $PD$ to represent the failure mode behaviour
of a potential divider.
Thus for single failure modes, a potential divider can fail
$fm(PD) = \{PDHigh,PDLow\}$.
with $fm(PD) = \{PDHigh,PDLow\}$.
The potential divider is used to program the gain of IC1.
IC1 and PD1 provide the function of buffering
IC1 and PD provide the function of buffering
/amplifying the signal $+V1$.
We can treat IC1 and PD1 as a functional group.
We can now examine IC1 and PD as a functional group.
\subsection{Functional Group: Amplifier}
@ -100,7 +102,7 @@ a functional group we can analyse its failure mode behaviour.
\begin{table}[ht]
\caption{Non Inverting Amplifier: Failure Mode Effects Analysis: Single Faults} % title of Table
\caption{Non Inverting Amplifier $NI\_AMP$: Failure Mode Effects Analysis: Single Faults} % title of Table
\centering % used for centering table
\begin{tabular}{||l|c|c|l|l||}
\hline \hline
@ -124,7 +126,7 @@ a functional group we can analyse its failure mode behaviour.
Collecting the symptoms we can see that this amplifier fails
in 3 ways $\{ AMPHigh, AMPLow, LowPass \}$.
We can now create a derived component, $NONINVAMP$, to represent it.
We can now create a derived component, $NI\_AMP$, to represent it.
$$ fm(NI\_AMP) = \{ AMPHigh, AMPLow, LowPass \} $$
@ -138,7 +140,8 @@ The second stage of this amplifier, following the signal path, is the amplifier
consisting of $R3,R4,IC2$.
This is in exactly the same configuration as the first amplifier.
Its failure mode are therefore the same.
Its failure modes are therefore the same. We can therefore re-use
the derived component for $NI\_AMP$
\pagebreak[4]
\subsection{Modelling the circuit}
@ -161,9 +164,9 @@ two derived components of the type $NI\_AMP$.
TC1: $NI\_AMP1$ AMPHigh & opamp 2 driven high & & DiffAMPLow \\
TC2: $NI\_AMP1$ AMPLow & opamp 2 fdriven low & & DiffAMPHigh \\
TC3: $NI\_AMP1$ LowPass & opamp 2 driven with lag & & DiffAMP\_LP \\ \hline
TC4: $NI\_AMP2$ AMPHigh & dual amplifier high & & DiffAMPHigh\\
TC5: $NI\_AMP2$ AMPLow & dual amplifier low & & DiffAMPLow \\
TC6: $NI\_AMP2$ LowPass & dual amplifier lag/lowpass & & DiffAMP\_LP \\ \hline
TC4: $NI\_AMP2$ AMPHigh & Diff amplifier high & & DiffAMPHigh\\
TC5: $NI\_AMP2$ AMPLow & Diff amplifier low & & DiffAMPLow \\
TC6: $NI\_AMP2$ LowPass & Diff amplifier lag/lowpass & & DiffAMP\_LP \\ \hline
%TC7: $R_2$ OPEN & LOW & & LowPD \\ \hline
\hline
\end{tabular}
@ -180,11 +183,20 @@ We now create a derived component to represent the circuit in figure~\ref{fig:ci
$$ fm (DiffAMP) = \{DiffAMPLow, DiffAMPHigh, DiffAMP\_LP\} $$
Its interesting here to note that we can draw a directed graph
of the failure modes and derived components here.
By doing this we can trace any top level fault back to
Its interesting here to note that we can draw a directed graph (figure~\ref{fig:circuit1_dag})
of the failure modes and derived components.
Using this we can trace any top level fault back to
a component failure mode that could have caused it.
In fact we can re-construct an FTA diagram from the information in this graph.
We merely have to choose a top level event and work down using or gates.
\begin{figure}[h]
\centering
\includegraphics[width=400pt]{./circuit1_dag.png}
% circuit1_dag.png: 797x1145 pixel, 72dpi, 28.12x40.39 cm, bb=0 0 797 1145
\caption{Directed Acyclic Graph of Circuit1 failure modes}
\label{fig:circuit1_dag}
\end{figure}