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7ec153d397
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README.md
114
README.md
@ -7,7 +7,7 @@ A C89 driver for the 3-axis accelerometer LIS3DH. Supports both i2c and SPI.
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> - HP filter (4 c/o freq)
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> - 2G, 4G, 8G and 16G
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> - All power modes
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> - Interrupt generation (partial)
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> - Interrupt generation (soon)
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> - Free-fall detection (soon)
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> - Single and double click detection (soon)
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> - 4D/6D orientation detection (soon)
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@ -152,7 +152,7 @@ x: 0.516000, y: -0.852000, z: -0.112000
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Instead of polling for every single [x y z] set, a FIFO with programmable capacity ("watermark") can be used like such:
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All FIFO readings use 10-bit resolution regardless of the mode set in `lis.cfg.mode`.
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The watermark level can also be adjusted to a value [0-31] inclusive by modifying the `lis.cfg.fifo.fth` property before calling configure().
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The watermark level can also be adjusted to a value [0-32] inclusive by modifying the `lis.cfg.fifo.fth` property before calling configure().
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```c
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#define _GNU_SOURCE
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#include <unistd.h>
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@ -333,116 +333,6 @@ x: -0.016000, y: -0.032000, z: -0.040000
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x: -0.016000, y: -0.032000, z: -0.040000
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x: -0.008000, y: -0.024000, z: -0.008000
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```
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## Using interrupts
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The LIS3DH supports two different interrupt "output pins," `INT1` and `INT2`. The appropriate flag must be set in either `cfg.int1` or `cfg.int2` (only one of such flags can be set at a time!) and the interrupt source must be configured to trigger into `INT1` or `INT2`. Below is example code that listens and receives an interrupt when the FIFO watermark is reached i.e. it is full.
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```c
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#define _GNU_SOURCE
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <math.h>
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#include "lis3dh.h"
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#include "interrupt.h"
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#include "i2c.h"
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/* GPIO 12 or Pin 32 */
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#define GPIO_INTERRUPT_PIN 12
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int main() {
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lis3dh_t lis;
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struct lis3dh_fifo_data fifo;
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int k;
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lis.dev.init = i2c_init;
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lis.dev.read = i2c_read;
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lis.dev.write = i2c_write;
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lis.dev.sleep = usleep;
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lis.dev.deinit = i2c_deinit;
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if (lis3dh_init(&lis)) {
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/* error handling */
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}
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/* register interrupt */
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if (int_register(GPIO_INTERRUPT_PIN)) {
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/* error handling */
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}
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lis.cfg.mode = LIS3DH_MODE_NORMAL;
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lis.cfg.range = LIS3DH_FS_2G;
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lis.cfg.rate = LIS3DH_ODR_100_HZ;
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lis.cfg.fifo.mode = LIS3DH_FIFO_MODE_STREAM;
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lis.cfg.fifo.trig = LIS3DH_FIFO_TRIG_INT1; /* trigger into INT1 */
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lis.cfg.int1.wtm = 1; /* trigger upon watermark level reached */
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if (lis3dh_configure(&lis)) {
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/* error handling */
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}
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/* wait for interrupt from LIS3DH */
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if (int_poll(GPIO_INTERRUPT_PIN)) {
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/* error handling */
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}
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if (lis3dh_read_fifo(&lis, &fifo)) {
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/* error handling */
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}
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for(k=0; k<fifo.size; k++) {
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printf("%04.04f %04.04f %04.04f %04.04f\n", fifo.x[k], fifo.y[k], fifo.z[k]);
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}
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/* unregister interrupt */
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if (int_unregister(GPIO_INTERRUPT_PIN)) {
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/* error handling */
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}
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if (lis3dh_deinit(&lis)) {
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/* error handling */
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}
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return 0;
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}
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```
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Output:
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```
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$ ./lis3dh
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0.2040 -1.0120 -0.1720 1.0466
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0.2200 -1.0200 -0.1600 1.0557
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0.2160 -1.0200 -0.1600 1.0548
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0.2120 -1.0240 -0.1600 1.0579
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0.2200 -1.0160 -0.1760 1.0543
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0.2080 -0.9960 -0.1720 1.0319
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0.2080 -0.9960 -0.1760 1.0326
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0.2200 -1.0200 -0.1600 1.0557
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0.2200 -1.0160 -0.1560 1.0512
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0.2160 -1.0200 -0.1600 1.0548
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0.2120 -1.0240 -0.1520 1.0567
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0.2200 -1.0240 -0.1520 1.0583
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0.2160 -1.0200 -0.1520 1.0536
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0.2160 -1.0200 -0.1560 1.0542
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0.2080 -0.9960 -0.1760 1.0326
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0.2200 -1.0240 -0.1600 1.0595
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0.2120 -1.0000 -0.1720 1.0366
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0.2120 -0.9960 -0.1760 1.0334
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0.2200 -1.0240 -0.1600 1.0595
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0.2200 -1.0200 -0.1600 1.0557
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0.2080 -0.9960 -0.1640 1.0306
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0.1920 -1.0080 -0.1600 1.0385
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0.2080 -1.0080 -0.1600 1.0416
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0.2200 -1.0240 -0.1520 1.0583
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0.2080 -1.0000 -0.1720 1.0358
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0.2080 -0.9960 -0.1480 1.0282
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0.2040 -1.0240 -0.1560 1.0557
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0.2200 -1.0240 -0.1560 1.0589
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0.2120 -1.0040 -0.1520 1.0373
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0.2120 -1.0200 -0.1560 1.0534
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0.2200 -1.0240 -0.1560 1.0589
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```
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### Using i2c on STM32
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Simple example code
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56
lis3dh.c
56
lis3dh.c
@ -58,7 +58,7 @@ int lis3dh_init(lis3dh_t *lis3dh) {
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lis3dh->cfg.fifo.mode = 0xFF; /* in use if neq 0xFF */
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lis3dh->cfg.fifo.trig = 0;
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lis3dh->cfg.fifo.fth = 31; /* default watermark level. */
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lis3dh->cfg.fifo.fth = 32; /* default watermark level. */
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lis3dh->cfg.filter.mode = 0xFF; /* in use if neq 0xFF */
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lis3dh->cfg.filter.cutoff = 0;
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@ -67,20 +67,20 @@ int lis3dh_init(lis3dh_t *lis3dh) {
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lis3dh->cfg.filter.ia1 = 0;
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lis3dh->cfg.filter.ia2 = 0;
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lis3dh->cfg.int1.click = 0;
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lis3dh->cfg.int1.ia1 = 0;
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lis3dh->cfg.int1.ia2 = 0;
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lis3dh->cfg.int1.drdy_zyxda = 0;
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lis3dh->cfg.int1.drdy_321 = 0;
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lis3dh->cfg.int1.wtm = 0;
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lis3dh->cfg.int1.overrun = 0;
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lis3dh->cfg.pin1.click = 0;
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lis3dh->cfg.pin1.ia1 = 0;
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lis3dh->cfg.pin1.ia2 = 0;
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lis3dh->cfg.pin1.drdy_zyxda = 0;
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lis3dh->cfg.pin1.drdy_321 = 0;
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lis3dh->cfg.pin1.wtm = 0;
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lis3dh->cfg.pin1.overrun = 0;
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lis3dh->cfg.int2.click = 0;
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lis3dh->cfg.int2.ia1 = 0;
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lis3dh->cfg.int2.ia2 = 0;
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lis3dh->cfg.int2.boot = 0;
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lis3dh->cfg.int2.act = 0;
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lis3dh->cfg.int2.polarity = 0;
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lis3dh->cfg.pin2.click = 0;
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lis3dh->cfg.pin2.ia1 = 0;
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lis3dh->cfg.pin2.ia2 = 0;
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lis3dh->cfg.pin2.boot = 0;
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lis3dh->cfg.pin2.act = 0;
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lis3dh->cfg.pin2.polarity = 0;
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err |= lis3dh_reset(lis3dh);
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@ -103,21 +103,21 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
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ctrl_reg6 = 0;
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fifo_ctrl_reg = 0;
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/* set interrupt registers */
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ctrl_reg3 |= (lis3dh->cfg.int1.click & 1) << 7;
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ctrl_reg3 |= (lis3dh->cfg.int1.ia1 & 1) << 6;
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ctrl_reg3 |= (lis3dh->cfg.int1.ia2 & 1) << 5;
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ctrl_reg3 |= (lis3dh->cfg.int1.drdy_zyxda & 1) << 4;
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ctrl_reg3 |= (lis3dh->cfg.int1.drdy_321 & 1) << 3;
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ctrl_reg3 |= (lis3dh->cfg.int1.wtm & 1) << 2;
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ctrl_reg3 |= (lis3dh->cfg.int1.overrun & 1) << 1;
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/* set pin interrupt settings */
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ctrl_reg3 |= (lis3dh->cfg.pin1.click & 1) << 7;
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ctrl_reg3 |= (lis3dh->cfg.pin1.ia1 & 1) << 6;
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ctrl_reg3 |= (lis3dh->cfg.pin1.ia2 & 1) << 5;
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ctrl_reg3 |= (lis3dh->cfg.pin1.drdy_zyxda & 1) << 4;
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ctrl_reg3 |= (lis3dh->cfg.pin1.drdy_321 & 1) << 3;
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ctrl_reg3 |= (lis3dh->cfg.pin1.wtm & 1) << 2;
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ctrl_reg3 |= (lis3dh->cfg.pin1.overrun & 1) << 1;
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ctrl_reg6 |= (lis3dh->cfg.int2.click & 1) << 7;
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ctrl_reg6 |= (lis3dh->cfg.int2.ia1 & 1) << 6;
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ctrl_reg6 |= (lis3dh->cfg.int2.ia2 & 1) << 5;
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ctrl_reg6 |= (lis3dh->cfg.int2.boot & 1) << 4;
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ctrl_reg6 |= (lis3dh->cfg.int2.act & 1) << 3;
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ctrl_reg6 |= (lis3dh->cfg.int2.polarity & 1) << 1;
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ctrl_reg6 |= (lis3dh->cfg.pin2.click & 1) << 7;
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ctrl_reg6 |= (lis3dh->cfg.pin2.ia1 & 1) << 6;
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ctrl_reg6 |= (lis3dh->cfg.pin2.ia2 & 1) << 5;
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ctrl_reg6 |= (lis3dh->cfg.pin2.boot & 1) << 4;
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ctrl_reg6 |= (lis3dh->cfg.pin2.act & 1) << 3;
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ctrl_reg6 |= (lis3dh->cfg.pin2.polarity & 1) << 1;
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/* set enable FIFO */
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if (lis3dh->cfg.fifo.mode != 0xFF) {
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8
lis3dh.h
8
lis3dh.h
@ -63,7 +63,7 @@ struct lis3dh_device {
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int (*deinit)(void);
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};
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struct lis3dh_int2_config {
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struct lis3dh_pin2_config {
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uint8_t click; /* CLICK interrupt */
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uint8_t ia1; /* IA1 interrupt */
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uint8_t ia2; /* IA2 interrupt */
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@ -72,7 +72,7 @@ struct lis3dh_int2_config {
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uint8_t polarity; /* INT1 & INT2 polarity. 0 active high, 1 active low */
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};
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struct lis3dh_int1_config {
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struct lis3dh_pin1_config {
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uint8_t click; /* CLICK interrupt */
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uint8_t ia1; /* IA1 interrupt */
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uint8_t ia2; /* IA2 interrupt */
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@ -103,8 +103,8 @@ struct lis3dh_config {
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uint8_t mode; /* LPen and HR */
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struct lis3dh_fifo_config fifo;
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struct lis3dh_filter_config filter;
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struct lis3dh_int1_config int1;
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struct lis3dh_int2_config int2;
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struct lis3dh_pin1_config pin1;
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struct lis3dh_pin2_config pin2;
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};
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struct lis3dh_acceleration {
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