cleanup

README.md

@@ -16,7 +16,7 @@ A C89 driver for the 3-axis accelerometer LIS3DH. Supports both I2C and SPI.
 
 
 ## Examples
-See the `examples/` dir for complete code examples and explanations of LIS3DH terminology
+See the `example/` dir for complete code examples and explanations of LIS3DH terminology
 
 ## Implementation
 This driver requires the user to implement the following interface functions:

example/README.md

@@ -19,13 +19,7 @@ The FIFO "engine" samples/appends another set of [x y z] values at 1/ODR. The ma
 |  Stream          |   `LIS3DH_FIFO_MODE_STREAM` | FIFO continously writes new data at 1/ODR and will overwrite old data until it is read/emptied. See file: `fifo-mode-stream.c`    |
 |  Stream_to_FIFO  |   `LIS3DH_FIFO_STREAM_TO_FIFO`  | FIFO behaves like Stream mode until a set interrupt is activated, then changes to a mode FIFO. |
 
-
-### file: interrupts.c
-This device supports two different interrupt "output pins," `INT1` and `INT2`. The appropriate flag must be set in either `cfg.pin1` or `cfg.pin2` and the interrupt source must be configured to trigger into `INT1` or `INT2`.
-
-This file contains example code that listens and receives an interrupt when the FIFO overrun is reached i.e. it is full.
-
-Note: `pin1.wtm` will NOT trigger if the FIFO size is 32 (default). Use `pin1.overrun` if you want an interrupt when the FIFO is full at full size (32.)
+Note: FIFO will not trigger a watermark interrupt (`pin1.wtm`) if the FIFO size is default (32; maximum size). To use the watermark interrupt, the FIFO size has to be between [1-31]. An overrun interrupt (`pin1.overrun`) will always trigger when the FIFO is full, regardless of programmed capacity.
 
 ### file: single-click.c
 

lis3dh.c

@@ -398,23 +398,22 @@ int lis3dh_read_temp(lis3dh_t *lis3dh) {
 
 /* This function is meant to be used to reset the FIFO in `FIFO' mode. */
 int lis3dh_fifo_reset(lis3dh_t *lis3dh) {
-    /* 1. write BYPASS cfg */
-    /* 2. maybe sleep */
-    /* 3. write FIFO cfg as in configure() */
     int err = 0;
     uint8_t fifo_ctrl_reg = 0;
 
+    /* create a FIFO_MODE_BYPASS config */
     fifo_ctrl_reg |= ((lis3dh->cfg.fifo.size - 1) & 0x1F);
     fifo_ctrl_reg |= (LIS3DH_FIFO_MODE_BYPASS << 6);
     fifo_ctrl_reg |= ((lis3dh->cfg.fifo.trig & 1) << 5);
 
+    /* write it to the device */
     err |= lis3dh->dev.write(REG_FIFO_CTRL_REG, fifo_ctrl_reg);
     lis3dh->dev.sleep(1000);
 
-    fifo_ctrl_reg |= ((lis3dh->cfg.fifo.size - 1) & 0x1F);
+    /* re-create original FIFO mode config */
     fifo_ctrl_reg |= (lis3dh->cfg.fifo.mode << 6);
-    fifo_ctrl_reg |= ((lis3dh->cfg.fifo.trig & 1) << 5);
 
+    /* write to device to immediately start FIFO sampling process */
     err |= lis3dh->dev.write(REG_FIFO_CTRL_REG, fifo_ctrl_reg);
 
     return err;