From f6020e9d155f68eb7f62ce59b700f80097363f82 Mon Sep 17 00:00:00 2001 From: William Clark Date: Fri, 5 Jan 2024 20:32:03 +0000 Subject: [PATCH] fth -> size; make user config more consistent --- example/README.md | 4 ++-- example/interrupts.c | 2 +- lis3dh.c | 10 +++++----- lis3dh.h | 2 +- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/example/README.md b/example/README.md index 16bd2a1..8bfff7d 100644 --- a/example/README.md +++ b/example/README.md @@ -4,9 +4,9 @@ Basic example of how to use this device ### file: fifo.c -Instead of polling for every single [x y z] set, a FIFO with programmable capacity ("watermark") can be used, and then dumped into memory once full. All FIFO readings use 10-bit resolution regardless of the mode set in `lis.cfg.mode`. The watermark level can be adjusted to a value [0-31] by modifying the `lis.cfg.fifo.fth` property before calling `lis3dh_configure()`. +Instead of polling for every single [x y z] set, a FIFO with programmable capacity ("watermark") can be used, and then dumped into memory once full. All FIFO readings use 10-bit resolution regardless of the mode set in `lis.cfg.mode`. The watermark level can be adjusted to a value [1-32] (0 disables FIFO) by modifying the `lis.cfg.fifo.size` property before calling `lis3dh_configure()`. -The LIS3DH can optionally apply a HP filter on the sample data. It can be used to greatly reduce the "DC acceleration" present. +The LIS3DH can optionally apply a HP filter on the sampling to reduce 'static acceleration' from the data. ### file: interrupts.c This device supports two different interrupt "output pins," `INT1` and `INT2`. The appropriate flag must be set in either `cfg.pin1` or `cfg.pin2` and the interrupt source must be configured to trigger into `INT1` or `INT2`. diff --git a/example/interrupts.c b/example/interrupts.c index 036fce4..e052b08 100644 --- a/example/interrupts.c +++ b/example/interrupts.c @@ -42,7 +42,7 @@ int main() { lis.cfg.rate = LIS3DH_ODR_100_HZ; lis.cfg.fifo.mode = LIS3DH_FIFO_MODE_STREAM; lis.cfg.fifo.trig = LIS3DH_FIFO_TRIG_INT1; /* trigger interrupt into int pin1 */ - /*lis.cfg.fifo.fth = 15;*/ + /*lis.cfg.fifo.size = 15;*/ lis.cfg.pin1.wtm = 1; /* trigger upon FIFO watermark level reached */ /* set up HP filter to remove DC component */ diff --git a/lis3dh.c b/lis3dh.c index 6aa8ef4..c042fee 100644 --- a/lis3dh.c +++ b/lis3dh.c @@ -28,7 +28,7 @@ int lis3dh_init(lis3dh_t *lis3dh) { memset(&lis3dh->src, 0, sizeof lis3dh->src); lis3dh->cfg.fifo.mode = 0xFF; /* in use if neq 0xFF */ - lis3dh->cfg.fifo.fth = 31; /* default watermark level (0-indexed). */ + lis3dh->cfg.fifo.size = 32; /* default fifo size */ lis3dh->cfg.filter.mode = 0xFF; /* in use if neq 0xFF */ lis3dh->cfg.filter.fds = 1; /* bypass OFF by default */ @@ -139,10 +139,10 @@ int lis3dh_configure(lis3dh_t *lis3dh) { int1_ths = lis3dh->cfg.int1_ths & 0x7F; int2_ths = lis3dh->cfg.int2_ths & 0x7F; - /* set enable FIFO */ - if (lis3dh->cfg.fifo.mode != 0xFF) { + /* set enable FIFO if a mode is set and size (watermark) is not 0 */ + if (lis3dh->cfg.fifo.mode != 0xFF && lis3dh->cfg.fifo.size != 0) { ctrl_reg5 |= 0x40; /* bit FIFO_EN */ - fifo_ctrl_reg |= (lis3dh->cfg.fifo.fth & 0x1F); + fifo_ctrl_reg |= ((lis3dh->cfg.fifo.size - 1) & 0x1F); fifo_ctrl_reg |= (lis3dh->cfg.fifo.mode << 6); fifo_ctrl_reg |= ((lis3dh->cfg.fifo.trig & 1) << 5); } @@ -284,7 +284,7 @@ int lis3dh_read_fifo(lis3dh_t *lis3dh, struct lis3dh_fifo_data *fifo) { /* FIFO is always 10-bit / normal mode */ sens = acc_sensitivity(LIS3DH_MODE_NORMAL, lis3dh->cfg.range); - fifo->size = lis3dh->cfg.fifo.fth; + fifo->size = lis3dh->cfg.fifo.size; err |= lis3dh->dev.read(REG_OUT_X_L, data, fifo->size * 6); diff --git a/lis3dh.h b/lis3dh.h index d0d7758..a97151f 100644 --- a/lis3dh.h +++ b/lis3dh.h @@ -160,7 +160,7 @@ struct lis3dh_filter_config { /* config for FIFO */ struct lis3dh_fifo_config { - uint8_t fth; /* user-specified watermark level 0-32 */ + uint8_t size; /* size of fifo; 0-32; 0=don't use. fth=[1-32]-1 (index) */ uint8_t trig; /* pin to trigger when watermark/overrun occurs */ uint8_t mode; /* FIFO mode */ };