william/lis3dh
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rename {pin1,pin2} => {int1,int2}

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This commit is contained in:
William Clark 2023-12-28 18:15:25 +00:00
parent 7ec153d397
commit b0907115c2
3 changed files with 32 additions and 32 deletions
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54
lis3dh.c
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@ -67,20 +67,20 @@ int lis3dh_init(lis3dh_t *lis3dh) {
lis3dh->cfg.filter.ia1 = 0; lis3dh->cfg.filter.ia1 = 0;
lis3dh->cfg.filter.ia2 = 0; lis3dh->cfg.filter.ia2 = 0;
lis3dh->cfg.pin1.click = 0; lis3dh->cfg.int1.click = 0;
lis3dh->cfg.pin1.ia1 = 0; lis3dh->cfg.int1.ia1 = 0;
lis3dh->cfg.pin1.ia2 = 0; lis3dh->cfg.int1.ia2 = 0;
lis3dh->cfg.pin1.drdy_zyxda = 0; lis3dh->cfg.int1.drdy_zyxda = 0;
lis3dh->cfg.pin1.drdy_321 = 0; lis3dh->cfg.int1.drdy_321 = 0;
lis3dh->cfg.pin1.wtm = 0; lis3dh->cfg.int1.wtm = 0;
lis3dh->cfg.pin1.overrun = 0; lis3dh->cfg.int1.overrun = 0;
lis3dh->cfg.pin2.click = 0; lis3dh->cfg.int2.click = 0;
lis3dh->cfg.pin2.ia1 = 0; lis3dh->cfg.int2.ia1 = 0;
lis3dh->cfg.pin2.ia2 = 0; lis3dh->cfg.int2.ia2 = 0;
lis3dh->cfg.pin2.boot = 0; lis3dh->cfg.int2.boot = 0;
lis3dh->cfg.pin2.act = 0; lis3dh->cfg.int2.act = 0;
lis3dh->cfg.pin2.polarity = 0; lis3dh->cfg.int2.polarity = 0;
err |= lis3dh_reset(lis3dh); err |= lis3dh_reset(lis3dh);
@ -103,21 +103,21 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
ctrl_reg6 = 0; ctrl_reg6 = 0;
fifo_ctrl_reg = 0; fifo_ctrl_reg = 0;
/* set pin interrupt settings */ /* set interrupt registers */
ctrl_reg3 |= (lis3dh->cfg.pin1.click & 1) << 7; ctrl_reg3 |= (lis3dh->cfg.int1.click & 1) << 7;
ctrl_reg3 |= (lis3dh->cfg.pin1.ia1 & 1) << 6; ctrl_reg3 |= (lis3dh->cfg.int1.ia1 & 1) << 6;
ctrl_reg3 |= (lis3dh->cfg.pin1.ia2 & 1) << 5; ctrl_reg3 |= (lis3dh->cfg.int1.ia2 & 1) << 5;
ctrl_reg3 |= (lis3dh->cfg.pin1.drdy_zyxda & 1) << 4; ctrl_reg3 |= (lis3dh->cfg.int1.drdy_zyxda & 1) << 4;
ctrl_reg3 |= (lis3dh->cfg.pin1.drdy_321 & 1) << 3; ctrl_reg3 |= (lis3dh->cfg.int1.drdy_321 & 1) << 3;
ctrl_reg3 |= (lis3dh->cfg.pin1.wtm & 1) << 2; ctrl_reg3 |= (lis3dh->cfg.int1.wtm & 1) << 2;
ctrl_reg3 |= (lis3dh->cfg.pin1.overrun & 1) << 1; ctrl_reg3 |= (lis3dh->cfg.int1.overrun & 1) << 1;
ctrl_reg6 |= (lis3dh->cfg.pin2.click & 1) << 7; ctrl_reg6 |= (lis3dh->cfg.int2.click & 1) << 7;
ctrl_reg6 |= (lis3dh->cfg.pin2.ia1 & 1) << 6; ctrl_reg6 |= (lis3dh->cfg.int2.ia1 & 1) << 6;
ctrl_reg6 |= (lis3dh->cfg.pin2.ia2 & 1) << 5; ctrl_reg6 |= (lis3dh->cfg.int2.ia2 & 1) << 5;
ctrl_reg6 |= (lis3dh->cfg.pin2.boot & 1) << 4; ctrl_reg6 |= (lis3dh->cfg.int2.boot & 1) << 4;
ctrl_reg6 |= (lis3dh->cfg.pin2.act & 1) << 3; ctrl_reg6 |= (lis3dh->cfg.int2.act & 1) << 3;
ctrl_reg6 |= (lis3dh->cfg.pin2.polarity & 1) << 1; ctrl_reg6 |= (lis3dh->cfg.int2.polarity & 1) << 1;
/* set enable FIFO */ /* set enable FIFO */
if (lis3dh->cfg.fifo.mode != 0xFF) { if (lis3dh->cfg.fifo.mode != 0xFF) {

8
lis3dh.h
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@ -63,7 +63,7 @@ struct lis3dh_device {
int (*deinit)(void); int (*deinit)(void);
}; };
struct lis3dh_pin2_config { struct lis3dh_int2_config {
uint8_t click; /* CLICK interrupt */ uint8_t click; /* CLICK interrupt */
uint8_t ia1; /* IA1 interrupt */ uint8_t ia1; /* IA1 interrupt */
uint8_t ia2; /* IA2 interrupt */ uint8_t ia2; /* IA2 interrupt */
@ -72,7 +72,7 @@ struct lis3dh_pin2_config {
uint8_t polarity; /* INT1 & INT2 polarity. 0 active high, 1 active low */ uint8_t polarity; /* INT1 & INT2 polarity. 0 active high, 1 active low */
}; };
struct lis3dh_pin1_config { struct lis3dh_int1_config {
uint8_t click; /* CLICK interrupt */ uint8_t click; /* CLICK interrupt */
uint8_t ia1; /* IA1 interrupt */ uint8_t ia1; /* IA1 interrupt */
uint8_t ia2; /* IA2 interrupt */ uint8_t ia2; /* IA2 interrupt */
@ -103,8 +103,8 @@ struct lis3dh_config {
uint8_t mode; /* LPen and HR */ uint8_t mode; /* LPen and HR */
struct lis3dh_fifo_config fifo; struct lis3dh_fifo_config fifo;
struct lis3dh_filter_config filter; struct lis3dh_filter_config filter;
struct lis3dh_pin1_config pin1; struct lis3dh_int1_config int1;
struct lis3dh_pin2_config pin2; struct lis3dh_int2_config int2;
}; };
struct lis3dh_acceleration { struct lis3dh_acceleration {

2
main.c
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@ -52,7 +52,7 @@ int main() {
lis.cfg.rate = LIS3DH_ODR_100_HZ; lis.cfg.rate = LIS3DH_ODR_100_HZ;
lis.cfg.fifo.mode = LIS3DH_FIFO_MODE_STREAM; lis.cfg.fifo.mode = LIS3DH_FIFO_MODE_STREAM;
lis.cfg.fifo.trig = LIS3DH_FIFO_TRIG_INT1; lis.cfg.fifo.trig = LIS3DH_FIFO_TRIG_INT1;
lis.cfg.pin1.overrun = 1; lis.cfg.int1.overrun = 1;
/* write device config */ /* write device config */