From 87dd035d9e989f3c2157ef7dd459d0639525c587 Mon Sep 17 00:00:00 2001
From: William Clark <wrvc96@gmail.com>
Date: Sat, 30 Dec 2023 15:36:35 +0000
Subject: [PATCH] int to int_pin rename to avoid confusion with int regs

---
 lis3dh.c | 34 +++++++++++++++++-----------------
 lis3dh.h |  8 ++++----
 main.c   |  4 ++--
 3 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/lis3dh.c b/lis3dh.c
index dbcfcd5..37847dd 100644
--- a/lis3dh.c
+++ b/lis3dh.c
@@ -63,8 +63,8 @@ int lis3dh_init(lis3dh_t *lis3dh) {
     lis3dh->cfg.fifo.fth = 31; /* default watermark level. */
 
     memset(&lis3dh->acc, 0, sizeof lis3dh->acc);
-    memset(&lis3dh->cfg.int1, 0, sizeof lis3dh->cfg.int1);
-    memset(&lis3dh->cfg.int2, 0, sizeof lis3dh->cfg.int2);
+    memset(&lis3dh->cfg.int_pin1, 0, sizeof lis3dh->cfg.int_pin1);
+    memset(&lis3dh->cfg.int_pin2, 0, sizeof lis3dh->cfg.int_pin2);
     memset(&lis3dh->cfg.filter, 0, sizeof lis3dh->cfg.filter);
 
     lis3dh->cfg.filter.mode = 0xFF; /* in use if neq 0xFF */
@@ -92,23 +92,23 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
     fifo_ctrl_reg = 0;
 
     /* set interrupt registers */
-    ctrl_reg3 |= (lis3dh->cfg.int1.click & 1) << 7;
-    ctrl_reg3 |= (lis3dh->cfg.int1.ia1 & 1) << 6;
-    ctrl_reg3 |= (lis3dh->cfg.int1.ia2 & 1) << 5;
-    ctrl_reg3 |= (lis3dh->cfg.int1.drdy_zyxda & 1) << 4;
-    ctrl_reg3 |= (lis3dh->cfg.int1.drdy_321 & 1) << 3;
-    ctrl_reg3 |= (lis3dh->cfg.int1.wtm & 1) << 2;
-    ctrl_reg3 |= (lis3dh->cfg.int1.overrun & 1) << 1;
+    ctrl_reg3 |= (lis3dh->cfg.int_pin1.click & 1) << 7;
+    ctrl_reg3 |= (lis3dh->cfg.int_pin1.ia1 & 1) << 6;
+    ctrl_reg3 |= (lis3dh->cfg.int_pin1.ia2 & 1) << 5;
+    ctrl_reg3 |= (lis3dh->cfg.int_pin1.drdy_zyxda & 1) << 4;
+    ctrl_reg3 |= (lis3dh->cfg.int_pin1.drdy_321 & 1) << 3;
+    ctrl_reg3 |= (lis3dh->cfg.int_pin1.wtm & 1) << 2;
+    ctrl_reg3 |= (lis3dh->cfg.int_pin1.overrun & 1) << 1;
 
-    ctrl_reg6 |= (lis3dh->cfg.int2.click & 1) << 7;
-    ctrl_reg6 |= (lis3dh->cfg.int2.ia1 & 1) << 6;
-    ctrl_reg6 |= (lis3dh->cfg.int2.ia2 & 1) << 5;
-    ctrl_reg6 |= (lis3dh->cfg.int2.boot & 1) << 4;
-    ctrl_reg6 |= (lis3dh->cfg.int2.act & 1) << 3;
-    ctrl_reg6 |= (lis3dh->cfg.int2.polarity & 1) << 1;
+    ctrl_reg6 |= (lis3dh->cfg.int_pin2.click & 1) << 7;
+    ctrl_reg6 |= (lis3dh->cfg.int_pin2.ia1 & 1) << 6;
+    ctrl_reg6 |= (lis3dh->cfg.int_pin2.ia2 & 1) << 5;
+    ctrl_reg6 |= (lis3dh->cfg.int_pin2.boot & 1) << 4;
+    ctrl_reg6 |= (lis3dh->cfg.int_pin2.act & 1) << 3;
+    ctrl_reg6 |= (lis3dh->cfg.int_pin2.polarity & 1) << 1;
 
-    ctrl_reg5 |= (lis3dh->cfg.int1.latch & 1) << 3;
-    ctrl_reg5 |= (lis3dh->cfg.int2.latch & 1) << 1;
+    ctrl_reg5 |= (lis3dh->cfg.int_pin1.latch & 1) << 3;
+    ctrl_reg5 |= (lis3dh->cfg.int_pin2.latch & 1) << 1;
 
     /* set enable FIFO */
     if (lis3dh->cfg.fifo.mode != 0xFF) {
diff --git a/lis3dh.h b/lis3dh.h
index 6d9bf2a..95ce0ee 100644
--- a/lis3dh.h
+++ b/lis3dh.h
@@ -65,7 +65,7 @@ struct lis3dh_device {
 };
 
 /* config for INT2 trigger output */
-struct lis3dh_int2_config {
+struct lis3dh_int_pin2_config {
     uint8_t click; /* CLICK interrupt */
     uint8_t ia1; /* IA1 interrupt */
     uint8_t ia2; /* IA2 interrupt */
@@ -76,7 +76,7 @@ struct lis3dh_int2_config {
 };
 
 /* config for INT1 trigger output */
-struct lis3dh_int1_config {
+struct lis3dh_int_pin1_config {
     uint8_t click; /* CLICK interrupt */
     uint8_t ia1; /* IA1 interrupt */
     uint8_t ia2; /* IA2 interrupt */
@@ -110,8 +110,8 @@ struct lis3dh_config {
     uint8_t mode; /* LPen and HR */
     struct lis3dh_fifo_config fifo;
     struct lis3dh_filter_config filter;
-    struct lis3dh_int1_config int1;
-    struct lis3dh_int2_config int2;
+    struct lis3dh_int_pin1_config int_pin1;
+    struct lis3dh_int_pin2_config int_pin2;
 };
 
 /* data read not from FIFO is put here */
diff --git a/main.c b/main.c
index 5e9d83a..3d3eaaa 100644
--- a/main.c
+++ b/main.c
@@ -52,8 +52,8 @@ int main() {
     lis.cfg.rate = LIS3DH_ODR_100_HZ;
     lis.cfg.fifo.mode = LIS3DH_FIFO_MODE_STREAM;
     lis.cfg.fifo.trig = LIS3DH_FIFO_TRIG_INT2;
-    lis.cfg.int1.wtm = 1;
-    lis.cfg.int1.latch = 1;
+    lis.cfg.int_pin1.wtm = 1;
+    lis.cfg.int_pin1.latch = 1;
     lis.cfg.filter.mode = LIS3DH_FILTER_MODE_AUTORESET;
     lis.cfg.filter.cutoff = LIS3DH_FILTER_CUTOFF_8;