latch interrupts + fn to clear on device
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parent
c96f77127d
commit
84e6fa4caa
17
lis3dh.c
17
lis3dh.c
@ -74,6 +74,7 @@ int lis3dh_init(lis3dh_t *lis3dh) {
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lis3dh->cfg.int1.drdy_321 = 0;
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lis3dh->cfg.int1.wtm = 0;
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lis3dh->cfg.int1.overrun = 0;
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lis3dh->cfg.int1.latch = 0;
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lis3dh->cfg.int2.click = 0;
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lis3dh->cfg.int2.ia1 = 0;
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@ -81,6 +82,7 @@ int lis3dh_init(lis3dh_t *lis3dh) {
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lis3dh->cfg.int2.boot = 0;
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lis3dh->cfg.int2.act = 0;
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lis3dh->cfg.int2.polarity = 0;
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lis3dh->cfg.int2.latch = 0;
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err |= lis3dh_reset(lis3dh);
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@ -119,6 +121,9 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
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ctrl_reg6 |= (lis3dh->cfg.int2.act & 1) << 3;
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ctrl_reg6 |= (lis3dh->cfg.int2.polarity & 1) << 1;
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ctrl_reg5 |= (lis3dh->cfg.int1.latch & 1) << 3;
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ctrl_reg5 |= (lis3dh->cfg.int2.latch & 1) << 1;
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/* set enable FIFO */
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if (lis3dh->cfg.fifo.mode != 0xFF) {
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ctrl_reg5 |= 0x40; /* bit FIFO_EN */
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@ -332,3 +337,15 @@ int lis3dh_read_fifo(lis3dh_t *lis3dh, struct lis3dh_fifo_data *fifo) {
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int lis3dh_deinit(lis3dh_t *lis3dh) {
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return lis3dh->dev.deinit();
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}
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/* read INT1_SRC to clear latched INT1 irq */
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int lis3dh_clear_int1(lis3dh_t *lis3dh) {
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uint8_t res;
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return lis3dh->dev.read(REG_INT1_SRC, &res, 1);
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}
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/* read INT2_SRC to clear latched INT2 irq */
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int lis3dh_clear_int2(lis3dh_t *lis3dh) {
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uint8_t res;
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return lis3dh->dev.read(REG_INT2_SRC, &res, 1);
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}
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4
lis3dh.h
4
lis3dh.h
@ -70,6 +70,7 @@ struct lis3dh_int2_config {
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uint8_t boot; /* enable BOOT on pin 2 */
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uint8_t act; /* interrupt on activity */
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uint8_t polarity; /* INT1 & INT2 polarity. 0 active high, 1 active low */
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uint8_t latch;
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};
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struct lis3dh_int1_config {
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@ -80,6 +81,7 @@ struct lis3dh_int1_config {
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uint8_t drdy_321; /* not sure */
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uint8_t wtm; /* FIFO reached watermark level */
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uint8_t overrun; /* FIFO has overrun */
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uint8_t latch;
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};
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struct lis3dh_filter_config {
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@ -136,6 +138,8 @@ int lis3dh_poll(lis3dh_t *lis3dh);
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int lis3dh_read(lis3dh_t *lis3dh);
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int lis3dh_poll_fifo(lis3dh_t *lis3dh);
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int lis3dh_read_fifo(lis3dh_t *lis3dh, struct lis3dh_fifo_data *fifo);
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int lis3dh_clear_int1(lis3dh_t *lis3dh);
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int lis3dh_clear_int2(lis3dh_t *lis3dh);
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5
main.c
5
main.c
@ -52,6 +52,7 @@ int main() {
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lis.cfg.fifo.mode = LIS3DH_FIFO_MODE_STREAM;
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lis.cfg.fifo.trig = LIS3DH_FIFO_TRIG_INT1;
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lis.cfg.int1.wtm = 1;
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lis.cfg.int1.latch = 1;
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/* write device config */
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@ -64,6 +65,10 @@ int main() {
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quit("int_poll()", &lis);
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}
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if (lis3dh_clear_int1(&lis)) {
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quit("clear_int1()", &lis);
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}
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/* read stored fifo data into `fifo' struct */
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if (lis3dh_read_fifo(&lis, &fifo)) {
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quit("read_fifo()", &lis);
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