william/lis3dh
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latch interrupts + fn to clear on device

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This commit is contained in:
William Clark 2023-12-29 17:26:54 +00:00
parent c96f77127d
commit 84e6fa4caa
3 changed files with 26 additions and 0 deletions
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17
lis3dh.c
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@ -74,6 +74,7 @@ int lis3dh_init(lis3dh_t *lis3dh) {
lis3dh->cfg.int1.drdy_321 = 0; lis3dh->cfg.int1.drdy_321 = 0;
lis3dh->cfg.int1.wtm = 0; lis3dh->cfg.int1.wtm = 0;
lis3dh->cfg.int1.overrun = 0; lis3dh->cfg.int1.overrun = 0;
lis3dh->cfg.int1.latch = 0;
lis3dh->cfg.int2.click = 0; lis3dh->cfg.int2.click = 0;
lis3dh->cfg.int2.ia1 = 0; lis3dh->cfg.int2.ia1 = 0;
@ -81,6 +82,7 @@ int lis3dh_init(lis3dh_t *lis3dh) {
lis3dh->cfg.int2.boot = 0; lis3dh->cfg.int2.boot = 0;
lis3dh->cfg.int2.act = 0; lis3dh->cfg.int2.act = 0;
lis3dh->cfg.int2.polarity = 0; lis3dh->cfg.int2.polarity = 0;
lis3dh->cfg.int2.latch = 0;
err |= lis3dh_reset(lis3dh); err |= lis3dh_reset(lis3dh);
@ -119,6 +121,9 @@ int lis3dh_configure(lis3dh_t *lis3dh) {
ctrl_reg6 |= (lis3dh->cfg.int2.act & 1) << 3; ctrl_reg6 |= (lis3dh->cfg.int2.act & 1) << 3;
ctrl_reg6 |= (lis3dh->cfg.int2.polarity & 1) << 1; ctrl_reg6 |= (lis3dh->cfg.int2.polarity & 1) << 1;
ctrl_reg5 |= (lis3dh->cfg.int1.latch & 1) << 3;
ctrl_reg5 |= (lis3dh->cfg.int2.latch & 1) << 1;
/* set enable FIFO */ /* set enable FIFO */
if (lis3dh->cfg.fifo.mode != 0xFF) { if (lis3dh->cfg.fifo.mode != 0xFF) {
ctrl_reg5 |= 0x40; /* bit FIFO_EN */ ctrl_reg5 |= 0x40; /* bit FIFO_EN */
@ -331,4 +336,16 @@ int lis3dh_read_fifo(lis3dh_t *lis3dh, struct lis3dh_fifo_data *fifo) {
int lis3dh_deinit(lis3dh_t *lis3dh) { int lis3dh_deinit(lis3dh_t *lis3dh) {
return lis3dh->dev.deinit(); return lis3dh->dev.deinit();
}
/* read INT1_SRC to clear latched INT1 irq */
int lis3dh_clear_int1(lis3dh_t *lis3dh) {
uint8_t res;
return lis3dh->dev.read(REG_INT1_SRC, &res, 1);
}
/* read INT2_SRC to clear latched INT2 irq */
int lis3dh_clear_int2(lis3dh_t *lis3dh) {
uint8_t res;
return lis3dh->dev.read(REG_INT2_SRC, &res, 1);
} }

4
lis3dh.h
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@ -70,6 +70,7 @@ struct lis3dh_int2_config {
uint8_t boot; /* enable BOOT on pin 2 */ uint8_t boot; /* enable BOOT on pin 2 */
uint8_t act; /* interrupt on activity */ uint8_t act; /* interrupt on activity */
uint8_t polarity; /* INT1 & INT2 polarity. 0 active high, 1 active low */ uint8_t polarity; /* INT1 & INT2 polarity. 0 active high, 1 active low */
uint8_t latch;
}; };
struct lis3dh_int1_config { struct lis3dh_int1_config {
@ -80,6 +81,7 @@ struct lis3dh_int1_config {
uint8_t drdy_321; /* not sure */ uint8_t drdy_321; /* not sure */
uint8_t wtm; /* FIFO reached watermark level */ uint8_t wtm; /* FIFO reached watermark level */
uint8_t overrun; /* FIFO has overrun */ uint8_t overrun; /* FIFO has overrun */
uint8_t latch;
}; };
struct lis3dh_filter_config { struct lis3dh_filter_config {
@ -136,6 +138,8 @@ int lis3dh_poll(lis3dh_t *lis3dh);
int lis3dh_read(lis3dh_t *lis3dh); int lis3dh_read(lis3dh_t *lis3dh);
int lis3dh_poll_fifo(lis3dh_t *lis3dh); int lis3dh_poll_fifo(lis3dh_t *lis3dh);
int lis3dh_read_fifo(lis3dh_t *lis3dh, struct lis3dh_fifo_data *fifo); int lis3dh_read_fifo(lis3dh_t *lis3dh, struct lis3dh_fifo_data *fifo);
int lis3dh_clear_int1(lis3dh_t *lis3dh);
int lis3dh_clear_int2(lis3dh_t *lis3dh);

5
main.c
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@ -52,6 +52,7 @@ int main() {
lis.cfg.fifo.mode = LIS3DH_FIFO_MODE_STREAM; lis.cfg.fifo.mode = LIS3DH_FIFO_MODE_STREAM;
lis.cfg.fifo.trig = LIS3DH_FIFO_TRIG_INT1; lis.cfg.fifo.trig = LIS3DH_FIFO_TRIG_INT1;
lis.cfg.int1.wtm = 1; lis.cfg.int1.wtm = 1;
lis.cfg.int1.latch = 1;
/* write device config */ /* write device config */
@ -64,6 +65,10 @@ int main() {
quit("int_poll()", &lis); quit("int_poll()", &lis);
} }
if (lis3dh_clear_int1(&lis)) {
quit("clear_int1()", &lis);
}
/* read stored fifo data into `fifo' struct */ /* read stored fifo data into `fifo' struct */
if (lis3dh_read_fifo(&lis, &fifo)) { if (lis3dh_read_fifo(&lis, &fifo)) {
quit("read_fifo()", &lis); quit("read_fifo()", &lis);