2023-12-21 20:52:17 +00:00
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#include <stdio.h>
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2023-12-21 17:31:12 +00:00
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#include "lis3dh.h"
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2023-12-21 20:52:17 +00:00
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#include "registers.h"
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2023-12-21 17:31:12 +00:00
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2023-12-22 16:25:25 +00:00
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/* reset user regs and reload trim params */
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static int lis3dh_reset(lis3dh_t *lis3dh) {
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2023-12-21 23:29:22 +00:00
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int err = 0;
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2023-12-22 16:25:25 +00:00
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/* set BOOT bit so device reloads internal trim parameters */
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2023-12-21 23:29:22 +00:00
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err |= lis3dh->dev.write(REG_CTRL_REG5, 0x80);
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2023-12-22 16:25:25 +00:00
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/* write default values to rw regs */
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err |= lis3dh->dev.write(REG_CTRL_REG0, 0b10000);
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err |= lis3dh->dev.write(REG_CTRL_REG1, 0b111);
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err |= lis3dh->dev.write(REG_CTRL_REG2, 0);
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err |= lis3dh->dev.write(REG_CTRL_REG3, 0);
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err |= lis3dh->dev.write(REG_CTRL_REG4, 0);
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err |= lis3dh->dev.write(REG_CTRL_REG5, 0);
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err |= lis3dh->dev.write(REG_CTRL_REG6, 0);
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err |= lis3dh->dev.write(REG_FIFO_CTRL_REG, 0);
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err |= lis3dh->dev.write(REG_INT1_CFG, 0);
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err |= lis3dh->dev.write(REG_INT1_THS, 0);
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err |= lis3dh->dev.write(REG_INT1_DURATION, 0);
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err |= lis3dh->dev.write(REG_INT2_CFG, 0);
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err |= lis3dh->dev.write(REG_INT2_THS, 0);
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err |= lis3dh->dev.write(REG_INT2_DURATION, 0);
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err |= lis3dh->dev.write(REG_CLICK_CFG, 0);
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err |= lis3dh->dev.write(REG_CLICK_THS, 0);
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err |= lis3dh->dev.write(REG_TIME_LIMIT, 0);
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err |= lis3dh->dev.write(REG_TIME_LATENCY, 0);
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err |= lis3dh->dev.write(REG_TIME_WINDOW, 0);
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err |= lis3dh->dev.write(REG_ACT_THS, 0);
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err |= lis3dh->dev.write(REG_ACT_DUR, 0);
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2023-12-21 23:29:22 +00:00
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return err;
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}
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2023-12-21 17:31:12 +00:00
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int lis3dh_init(lis3dh_t *lis3dh) {
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2023-12-21 20:52:17 +00:00
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uint8_t result;
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int err = 0;
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2023-12-21 23:29:22 +00:00
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if (lis3dh->dev.init() != 0) {
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2023-12-22 10:22:43 +00:00
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return 1;
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2023-12-21 23:29:22 +00:00
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}
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2023-12-21 20:52:17 +00:00
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err |= lis3dh->dev.read(REG_WHO_AM_I, &result, 1);
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if (result != 0x33) {
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2023-12-22 10:22:43 +00:00
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return 1;
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2023-12-21 20:52:17 +00:00
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}
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2023-12-22 10:22:43 +00:00
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/* zero struct */
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lis3dh->acc.x = 0.0;
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lis3dh->acc.y = 0.0;
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lis3dh->acc.z = 0.0;
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lis3dh->cfg.rate = 0;
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lis3dh->cfg.range = 0;
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lis3dh->cfg.mode = 0;
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2023-12-22 16:25:25 +00:00
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lis3dh->cfg.fifo.mode = 0xFF; /* in use if neq 0xFF */
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2023-12-22 10:22:43 +00:00
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lis3dh->cfg.fifo.trig = 0;
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lis3dh->cfg.fifo.fth = 0;
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2023-12-22 17:00:53 +00:00
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lis3dh->cfg.filter.mode = 0xFF; /* in use if neq 0xFF */
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lis3dh->cfg.filter.cutoff = 0;
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lis3dh->cfg.filter.fds = 0;
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lis3dh->cfg.filter.hpclick = 0;
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lis3dh->cfg.filter.ia1 = 0;
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lis3dh->cfg.filter.ia2 = 0;
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2023-12-22 10:22:43 +00:00
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2023-12-22 16:25:25 +00:00
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err |= lis3dh_reset(lis3dh);
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2023-12-21 23:29:22 +00:00
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2023-12-21 20:52:17 +00:00
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return err;
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2023-12-21 17:31:12 +00:00
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}
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2023-12-21 23:29:22 +00:00
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int lis3dh_configure(lis3dh_t *lis3dh) {
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2023-12-22 17:00:53 +00:00
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uint8_t ctrl_reg1, ctrl_reg2, ctrl_reg4, ctrl_reg5;
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2023-12-22 10:22:43 +00:00
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uint8_t fifo_ctrl_reg;
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2023-12-22 08:26:10 +00:00
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uint8_t ref;
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2023-12-21 23:29:22 +00:00
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int err = 0;
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/* last 0b111 enables Z, Y and X axis */
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ctrl_reg1 = 0 | (lis3dh->cfg.rate << 4) | 0b111;
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2023-12-22 17:00:53 +00:00
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ctrl_reg2 = 0;
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2023-12-21 23:29:22 +00:00
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ctrl_reg4 = 0 | (lis3dh->cfg.range << 4);
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2023-12-22 10:22:43 +00:00
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ctrl_reg5 = 0;
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fifo_ctrl_reg = 0;
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/* set enable FIFO */
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2023-12-22 16:25:25 +00:00
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if (lis3dh->cfg.fifo.mode != 0xFF) {
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2023-12-22 10:22:43 +00:00
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ctrl_reg5 |= 0x40;
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fifo_ctrl_reg |= (lis3dh->cfg.fifo.fth & 0x1F);
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fifo_ctrl_reg |= (lis3dh->cfg.fifo.mode << 6);
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fifo_ctrl_reg |= ((lis3dh->cfg.fifo.trig & 1) << 5);
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}
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2023-12-21 23:29:22 +00:00
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2023-12-22 17:00:53 +00:00
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/* set enable filter */
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if (lis3dh->cfg.filter.mode != 0xFF) {
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ctrl_reg2 |= ((lis3dh->cfg.filter.mode & 0b11) << 6);
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ctrl_reg2 |= ((lis3dh->cfg.filter.cutoff & 0b11) << 4);
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ctrl_reg2 |= ((lis3dh->cfg.filter.fds & 1) << 3);
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ctrl_reg2 |= ((lis3dh->cfg.filter.hpclick & 1) << 2);
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ctrl_reg2 |= ((lis3dh->cfg.filter.ia1 & 1) << 1);
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ctrl_reg2 |= (lis3dh->cfg.filter.ia2 & 1);
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}
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2023-12-22 10:22:43 +00:00
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/* always set block update */
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2023-12-21 23:29:22 +00:00
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ctrl_reg4 |= 0x80;
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/* set high resolution */
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if (lis3dh->cfg.mode == LIS3DH_MODE_HR) {
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ctrl_reg4 |= 0x08;
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}
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2023-12-22 08:26:10 +00:00
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/* set LPen */
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if (lis3dh->cfg.mode == LIS3DH_MODE_LP) {
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ctrl_reg1 |= 0b1000;
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}
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2023-12-21 23:29:22 +00:00
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err |= lis3dh->dev.write(REG_CTRL_REG1, ctrl_reg1);
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2023-12-22 17:00:53 +00:00
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err |= lis3dh->dev.write(REG_CTRL_REG2, ctrl_reg2);
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2023-12-21 23:29:22 +00:00
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err |= lis3dh->dev.write(REG_CTRL_REG4, ctrl_reg4);
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2023-12-22 10:22:43 +00:00
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err |= lis3dh->dev.write(REG_CTRL_REG5, ctrl_reg5);
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err |= lis3dh->dev.write(REG_FIFO_CTRL_REG, fifo_ctrl_reg);
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2023-12-21 23:29:22 +00:00
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2023-12-22 08:26:10 +00:00
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/* read REFERENCE to clear internal filter struct */
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err |= lis3dh->dev.read(REG_REFERENCE, &ref, 1);
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/* sleep for a period TBD ~ ODR */
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2023-12-22 16:25:25 +00:00
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lis3dh->dev.sleep(50000); /* 50 ms */
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2023-12-21 23:29:22 +00:00
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return err;
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}
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int lis3dh_poll(lis3dh_t *lis3dh) {
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uint8_t status;
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int err = 0;
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do {
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2023-12-22 10:22:43 +00:00
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lis3dh->dev.sleep(1000); /* 1 ms */
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2023-12-21 23:29:22 +00:00
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err |= lis3dh->dev.read(REG_STATUS_REG, &status, 1);
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} while (!err && !((status >> 3) & 1));
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return err;
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}
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2023-12-22 10:22:43 +00:00
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int lis3dh_poll_fifo(lis3dh_t *lis3dh) {
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uint8_t src;
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int err = 0;
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do {
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lis3dh->dev.sleep(1000); /* 1 ms */
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err |= lis3dh->dev.read(REG_FIFO_SRC_REG, &src, 1);
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} while (!err && !(src >> 6));
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return err;
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}
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2023-12-21 23:29:22 +00:00
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/* the real size of the int you get back from reading the acc u16
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depends on the power mode.
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shift down the 16 bit word by this amount: */
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static uint8_t acc_shift(lis3dh_t *lis3dh) {
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switch (lis3dh->cfg.mode) {
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case LIS3DH_MODE_HR:
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return 4; /* i12 */
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case LIS3DH_MODE_NORMAL:
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return 6; /* i10 */
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case LIS3DH_MODE_LP:
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return 8; /* i8 */
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}
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return 0;
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}
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/* returns a scalar that when multiplied with axis reading
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turns it to a multiple of mg. */
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static uint8_t acc_sensitivity(lis3dh_t *lis3dh) {
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uint8_t mode = lis3dh->cfg.mode;
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switch (lis3dh->cfg.range) {
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case LIS3DH_FS_2G:
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if (mode == LIS3DH_MODE_LP) {
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return 16;
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} else if (mode == LIS3DH_MODE_NORMAL) {
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return 4;
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} else {
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return 1;
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}
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break;
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case LIS3DH_FS_4G:
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if (mode == LIS3DH_MODE_LP) {
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return 32;
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} else if (mode == LIS3DH_MODE_NORMAL) {
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return 8;
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} else {
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return 2;
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}
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break;
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case LIS3DH_FS_8G:
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if (mode == LIS3DH_MODE_LP) {
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return 64;
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} else if (mode == LIS3DH_MODE_NORMAL) {
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return 16;
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} else {
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return 4;
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}
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break;
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case LIS3DH_FS_16G:
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if (mode == LIS3DH_MODE_LP) {
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return 192;
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} else if (mode == LIS3DH_MODE_NORMAL) {
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2023-12-22 08:26:10 +00:00
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return 48;
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2023-12-21 23:29:22 +00:00
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} else {
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return 12;
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}
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break;
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}
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2023-12-21 17:31:12 +00:00
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return 0;
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2023-12-21 23:29:22 +00:00
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}
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int lis3dh_read(lis3dh_t *lis3dh) {
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uint8_t data[6];
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int16_t x, y, z;
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uint8_t scale, sens;
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int err = 0;
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scale = acc_shift(lis3dh);
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sens = acc_sensitivity(lis3dh);
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/* must set MSbit of the address to multi-read and
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have the device auto-increment the address. */
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err |= lis3dh->dev.read(REG_OUT_X_L | 0x80, data, 6);
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2023-12-22 08:26:10 +00:00
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/* x,y,z are now in mg */
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2023-12-21 23:29:22 +00:00
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x = (((int16_t)((data[0] << 8) | data[1])) >> scale) * sens;
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y = (((int16_t)((data[2] << 8) | data[3])) >> scale) * sens;
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z = (((int16_t)((data[4] << 8) | data[5])) >> scale) * sens;
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lis3dh->acc.x = (double)x / 1000.0;
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lis3dh->acc.y = (double)y / 1000.0;
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lis3dh->acc.z = (double)z / 1000.0;
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return err;
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}
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2023-12-22 10:22:43 +00:00
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int lis3dh_read_fifo(lis3dh_t *lis3dh) {
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int16_t x, y, z;
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uint8_t scale, sens;
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uint8_t data[192];
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int err = 0;
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scale = acc_shift(lis3dh);
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sens = acc_sensitivity(lis3dh);
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/* must set MSbit of the address to multi-read and
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have the device auto-increment the address.
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see 5.1.5 in datasheet. */
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err |= lis3dh->dev.read(REG_OUT_X_L | 0x80, data, 192);
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puts("FIFO =>");
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for(int i=0; i<192; i+=6) {
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x = (((int16_t)((data[i + 0] << 8) | data[i + 1])) >> scale) * sens;
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y = (((int16_t)((data[i + 2] << 8) | data[i + 3])) >> scale) * sens;
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z = (((int16_t)((data[i + 4] << 8) | data[i + 5])) >> scale) * sens;
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printf("x: %04.04f, y: %04.04f, z: %04.04f\n",
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(double)x / 1000.0,
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(double)y / 1000.0,
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(double)z / 1000.0);
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}
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puts("<= FIFO");
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return err;
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}
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2023-12-21 23:29:22 +00:00
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int lis3dh_deinit(lis3dh_t *lis3dh) {
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return lis3dh->dev.deinit();
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2023-12-21 17:31:12 +00:00
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}
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