Go to file
2019-09-10 11:45:19 +01:00
DSP_DC_PASS.jpg Filter 15 16 chosen 2019-09-10 11:38:04 +01:00
HP48_notes.txt Update HP48_notes.txt 2019-09-09 18:56:10 +01:00
Makefile Zero poles at half nyquist 2019-09-10 09:12:01 +01:00
README.md Update README.md 2019-09-10 11:45:19 +01:00
tp_2.gpt As an experiment fed the 7/8 LAG in twice. It tstill does not perform as 2019-08-26 09:41:24 +01:00
tp.gpt 15 16 squared lag filter now ready for 8 bit compiler 2019-09-10 10:53:17 +01:00
two_pole_7_8.c Filter 15 16 chosen 2019-09-10 11:38:04 +01:00

two_pole_dc_pass

Implements the old 7/8ths LAG filter but squared and a 15/16 squared lag filter i.e. two pole versions.

Optimised for 8 bit implementations.