software.tex in CH5. Next sort out the conclusions to the bullet points at the start of CH% and make a closed loop software and hardware example for the new software.tex chapter....
674 lines
24 KiB
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674 lines
24 KiB
TeX
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\section{Software and Hardware Failure Mode Concepts}
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\label{sec:elecsw}
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FMMD can be applied to software, and thus we can build complete failure models
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of typical modern safety critical systems.
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With modular FMEA i.e. FMMD %(FMMD)
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we have the concepts of failure~modes
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of components, {\fgs} and symptoms of failure for a functional group.
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A programmatic function has similarities with a {\fg} as defined by the FMMD process.
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%
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An FMMD {\fg} is placed into a hierarchy.
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A software function is placed into a hierarchy, that of its call-tree.
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A software function typically calls other functions and uses data sources via hardware interaction, which could be viewed as its `components'.
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It has outputs, i.e. it can perform actions
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on data or hardware
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which will be used by functions that may call it.
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%
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We can map a software function to a {\fg} in FMMD. Its failure modes
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are the failure modes of the software components (other functions it calls)
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and the hardware from which it reads values.
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Its outputs are the data it changes, or the hardware actions it performs.
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%%
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%% Talk about how software specification will often say how hardware
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%% will react and how to interpret readings---but they do not
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%% always cover the failure modes of the hardware being interfaced too.
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When we have analysed a software function---using failure conditions
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of its inputs as failure modes---we can
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determine its symptoms of failure (i.e. how calling functions will see its failure mode behaviour).
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We can thus apply the $\derivec$ process to software functions, by viewing them in terms of their failure
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mode behaviour. To simplify things as well, software already fits into a hierarchy.
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For Electronics and Mechanical systems, although we may be guided by the original designers
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concepts of modularity and sub-systems in design, applying FMMD means deciding on the members for {\fgs}
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and the subsequent hierarchy. With software already written, that hierarchy is fixed.
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% map the FMMD concepts of {\fms}, {\fgs} and {\dcs}
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%to software functions.
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%
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%However, we need to map a the FMMD concepts of {\fms}, {\fgs} and {\dcs}
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%to software functions.
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% failure modes of a function in order to
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%map FMMD to software.
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% map the FMMD concepts of {\fms}, {\fgs} and {\dcs}
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%to software functions.
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%
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%However, we need to map a the FMMD concepts of {\fms}, {\fgs} and {\dcs}
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%to software functions.
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% failure modes of a function in order to
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%map FMMD to software.
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\subsection{Software, a natural hierarchy}
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Software written for safety critical systems is usually constrained to
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be modular~\cite{en61508}[3] and non recursive~\cite{misra}[15.2]. %{iec61511}.
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Because of this we can assume direct call trees~\footnote{A typical embedded system
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will have a run time call tree, and (possibly multiple) interrupt sourced call tress.}. Functions call functions
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from the top down and eventually call the lowest level library or IO
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functions that interact with hardware/electronics.
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What is potentially difficult with a software function, is deciding what
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its failure modes and symptoms are.
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With electronic components, we can use literature to point us to suitable sets of
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{\fms}~\cite{fmd91}~\cite{mil1991}~\cite{en298}. %~\cite{en61508}~\cite{en298}.
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With software, only some library functions are well known and rigorously documented
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enough to have the equivalent of known failure modes.
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Most software is `bespoke'. We need a different strategy to
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describe the failure mode behaviour of software functions.
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We can use definitions from contract programming to assist here.
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\subsection{Contract programming description}
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Contract programming is a discipline~\cite{dbcbe} for building software functions in a controlled
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and traceable way. Each function is subject to pre-conditions (constraints on its inputs),
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post-conditions (constraints on its outputs) and function wide invariants (rules).
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\paragraph{Mapping contract `pre-condition' violations to failure modes.}
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A precondition, or requirement for a contract software function
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defines the correct ranges of input conditions for the function
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to operate successfully.
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%
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For a software function, a violation of a pre-condition is
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in effect a failure mode of `one of its components'.
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\paragraph{Mapping contract `post-condition' violations to symptoms.}
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A post condition is a definition of correct behaviour by a function.
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A violated post condition is a symptom of failure, or derived failure mode, of a function.
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Post conditions could be either actions performed (i.e. the state of hardware changed) or an output value of a function.
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\paragraph{Mapping contract `invariant' violations to symptoms and failure modes.}
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Invariants in contract programming may apply to inputs to the function (where violations can be considered {\fms} in FMMD terminology),
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and to outputs (where violations can be considered {failure symptoms} in FMMD terminology).
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\subsection{Combined Hardware/Software FMMD}
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For the purpose of example, we chose a simple common safety critical industrial circuit
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that is nearly always used in conjunction with a programmatic element.
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A common method for delivering a quantitative value in analogue electronics is
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to supply a current signal to represent the value to be sent~\cite{aoe}[p.934].
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Usually, $4mA$ represents a zero or starting value and $20mA$ represents the full scale,
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and this is referred to as {\ft} signalling.
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%
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{\ft} signalling has intrinsic electrical safety advantages.
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%
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Because the current in a loop is constant~\cite{aoe}[p.20]
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resistance in the wires between the source and receiving end is not an issue
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that can alter the accuracy of the signal.
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%
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%This circuit has many advantages for safety.
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If the signal becomes disconnected
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it reads $0mA$ at the receiving end: as this is outside the {\ft} range,
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it is easily detectable as an error condition rather than an incorrect value.
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%
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Should the driving electronics go wrong at the source end, it will usually
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supply far too little or far too much current, also making error conditions easy to detect.
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%
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At the receiving end, we only require one simple component to convert the
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current signal into a voltage that we can read with an AD---a resistor---given
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its properties defined by Ohms law. % the humble resistor!
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%BLOCK DIAGRAM HERE WITH FT CIRCUIT LOOP
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\begin{figure}[h]
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\centering
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\includegraphics[width=230pt]{./CH5_Examples/ftcontext.png}
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% ftcontext.png: 767x385 pixel, 72dpi, 27.06x13.58 cm, bb=0 0 767 385
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\caption{Context Diagram for {\ft} loop}
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\label{fig:ftcontext}
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\end{figure}
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The diagram in figure~\ref{fig:ftcontext}, shows some equipment which is sending a {\ft}
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signal to a micro-controller system.
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The signal is locally driven over a load resistor, and then read into the micro-controller via
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an ADC and its multiplexer.
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With the voltage determined at the ADC we read the intended quantitative
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value from the external equipment.
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\subsection{Simple Software Example}
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Consider a software function that reads a {\ft} input, and returns a value between 0 and 999 (i.e. per mil $\permil$)
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representing the current detected with an additional error indication flag .
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%
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Let us assume the {\ft} detection is via a \ohms{220} resistor, and that we read a voltage
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from an ADC into the software.
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Let us define any value outside the 4mA to 20mA range as an error condition.
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%
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As we read a voltage voltage, we use Ohms law~\cite{aoe} to determine the mA current detected: $V=IR$, $0.004A * \ohms{220} = 0.88V$
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and $0.020A * \ohms{220} = 4.4V$.
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%
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Our acceptable voltage range is therefore
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$$(V \ge 0.88) \wedge (V \le 4.4) \; .$$
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This voltage range forms our input requirement and can be considered as an invariant condition.
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%
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We can now examine a software function that performs a conversion from the voltage read to
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a per~mil representation of the {\ft} input current.
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%
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For the purpose of example the `C' programming language~\cite{DBLP:books/ph/KernighanR88} is used.
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We initially assume a function \textbf{read\_ADC} which returns a floating point %double precision
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value which represents the voltage read (see code sample in figure~\ref{fig:code_read_4_20_input}).
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%%{\vbox{
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\begin{figure}[h+]
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\footnotesize
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\begin{verbatim}
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/***********************************************/
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/* read_4_20_input() */
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/***********************************************/
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/* Software function to read 4mA to 20mA input */
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/* returns a value from 0-999 proportional */
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/* to the current input. */
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/***********************************************/
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int read_4_20_input ( int * value ) {
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double input_volts;
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int error_flag;
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/* require: input from ADC to be
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between 0.88 and 4.4 volts */
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input_volts = read_ADC(INPUT_4_20_mA);
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if ( input_volts < 0.88 || input_volts > 4.4 ) {
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error_flag = 1; /* Error flag set to TRUE */
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}
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else {
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*value = (input_volts - 0.88) * ( 4.4 - 0.88 ) * 999.0;
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error_flag = 0; /* indicate current input in range */
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}
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/* ensure: value is proportional (0-999) to the
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4 to 20mA input */
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return error_flag;
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}
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\end{verbatim}
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%}
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%}\clearpage
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\caption{Software Function: \textbf{read\_4\_20\_input}}
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\label{fig:code_read_4_20_input}
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%\label{fig:420i}
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\end{figure}
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\clearpage
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We now look at the function called by \textbf{read\_4\_20\_input}, \textbf{read\_ADC}, which returns a
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voltage for a given ADC channel.
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%
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This function
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deals directly with the hardware in the micro-controller on which the software is running. %software on.
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%
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The software's job is to select the correct channel (ADC multiplexer) and then to initiate a
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conversion by setting an ADC 'go' bit (see code sample in figure~\ref{fig:code_read_ADC}).
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%
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It takes the raw ADC reading and converts it into a
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floating point\footnote{the type, `double' or `double precision', is a
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standard C language floating point type~\cite{DBLP:books/ph/KernighanR88}.}
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voltage value.
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%{\vbox{
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\begin{figure}[h+]
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\footnotesize
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\begin{verbatim}
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/***********************************************/
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/* read_ADC() */
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/***********************************************/
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/* Software function to read voltage from a */
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/* specified ADC MUX channel */
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/* Assume 10 ADC MUX channels 0..9 */
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/* ADC_CHAN_RANGE = 9 */
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/* Assume ADC is 12 bit and ADCRANGE = 4096 */
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/* returns voltage read as double precision */
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/***********************************************/
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double read_ADC( int channel ) {
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int timeout = 0;
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/* require: a) input channel from ADC to be
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in valid ADC range
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b) voltage ref is 0.1% of 5V */
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/* return out of range result */
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/* if invalid channel selected */
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if ( channnel > ADC_CHAN_RANGE )
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return -2.0;
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/* set the multiplexer to the desired channel */
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ADCMUX = channel;
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ADCGO = 1; /* initiate ADC conversion hardware */
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/* wait for ADC conversion with timeout */
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while ( ADCGO == 1 || timeout < 100 )
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timeout++;
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if ( timeout < 100 )
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dval = (double) ADCOUT * 5.0 / ADCRANGE;
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else
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dval = -1.0; /* indicate invalid reading */
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/* return voltage as a floating point value */
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/* ensure: value is voltage input to within 0.1% */
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return dval;
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}
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\end{verbatim}
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\caption{Software Function: \textbf{read\_ADC}}
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\label{fig:code_read_ADC}
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\end{figure}
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%}
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%}
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\clearpage
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We now have a very simple software structure, a call tree, shown in figure~\ref{fig:ct1}.
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\begin{figure}[h]
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\centering
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\includegraphics[width=100pt]{./CH5_Examples/ct1.png}
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% ct1.png: 151x224 pixel, 72dpi, 5.33x7.90 cm, bb=0 0 151 224
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\caption{Call tree for software example}
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\label{fig:ct1}
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\end{figure}
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This software is above the hardware in the conceptual call tree---from a programmatic perspective---%in software terms---the
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the software is reading values from the `lower~level' electronics.
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%
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FMEA is always a bottom-up process and so we must begin with this hardware.
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%
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The hardware is simply a load resistor, connected across an ADC input
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pin on the micro-controller and ground.
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%
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We can identify the resistor and the ADC module of the micro-controller as
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the base components in this design.
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%
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We now apply FMMD starting with the hardware.
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\subsection{FMMD Process}
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\paragraph{Functional Group - Convert mA to Voltage - CMATV}
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This functional group contains the load resistor
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and the physical Analogue to Digital Converter (ADC).
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Our functional group, $G_1$ is thus the set of base components: $G_1 = \{R, ADC\}$.
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We now determine the {\fms} of all the components in $G_1$.
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For the resistor we can use a failure mode set from the literature~\cite{en298}.
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Where the function $fm$ returns a set of failure modes for a given component we can state:
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$$ fm(R) = \{OPEN,SHORT\}. $$
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\vbox{
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For the ADC we can determine the following failure modes:
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\begin{itemize}
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\item STUCKAT --- The ADC outputs a constant value,
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\item MUXFAIL --- The ADC cannot select its input channel correctly,
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\item LOW --- The ADC output is always LOW, or zero ADC counts,
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\item HIGH --- The ADC output is always HIGH, or max ADC counts.
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\end{itemize}
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}
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We can use the function $fm$ to define the {\fms} of an ADC thus:
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$$ fm(ADC) = \{ STUCKAT, MUXFAIL,LOW, HIGH \}. $$
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With these failure modes, we can analyse our first functional group, see table~\ref{tbl:cmatv}.
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{
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\tiny
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\begin{table}[h+]
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\center
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\caption{$G_1$: Failure Mode Effects Analysis} % title of Table
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\label{tbl:cmatv}
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\begin{tabular}{|| l | c | l ||} \hline
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%\textbf{Failure} & \textbf{failure} & \textbf{Symptom} \\
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%\textbf{Scenario} & \textbf{effect} & \textbf{ADC } \\ \hline
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% & & & & \\
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\textbf{Failure} & \textbf{Failure } & \textbf{Derived Component} \\
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\textbf{cause} & \textbf{Effect} & \textbf{Failure Mode} \\
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\hline \hline
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1: $R_{OPEN}$ & resistor open, & $HIGH$ \\
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& voltage on pin high & \\ \hline
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2: $R_{SHORT}$ & resistor shorted, & $LOW$ \\
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& voltage on pin low & \\ \hline \hline
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3: $ADC_{STUCKAT}$ & ADC reads out & $V\_ERR$ \\
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& fixed value & \\ \hline
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4: $ADC_{MUXFAIL}$ & ADC may read & $V\_ERR$ \\
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& wrong channel & \\ \hline
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5: $ADC_{LOW}$ & output low & $LOW$ \\
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6: $ADC_{HIGH}$ & output high & $HIGH$ \\ \hline
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\hline
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\hline
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\end{tabular}
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\end{table}
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}
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We now collect the symptoms for the hardware functional group, $\{ HIGH , LOW, V\_ERR \} $.
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We now create a {\dc} to represent this called $CMATV$.
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We can express this using the `$\derivec$' function thus:
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$$ CMATV = \; \derivec (G_1) .$$
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As its failure modes, are the symptoms of failure from the functional group we can now state:
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$$fm ( CMATV ) = \{ HIGH , LOW, V\_ERR \} .$$
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\paragraph{Functional Group - Software - Read\_ADC - RADC}
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The software function $Read\_ADC$ uses the ADC hardware analysed
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as the {\dc} CMATV above.
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The code fragment in figure~\ref{fig:code_read_ADC} states pre-conditions, as
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{\em/* require: a) input channel from ADC to be
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in valid ADC range
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b) voltage ref is 0.1\% of 5V */}.
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%
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From the above contractual programming requirements, we see that
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the function must be sent the correct channel number.
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%
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A violation of this can be considered a {\fm} of the function,
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which we can call $ CHAN\_NO $.
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%
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The reference voltage for the ADC has a 0.1\% accuracy requirement.
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%
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If the reference value is outside of this, it is also a {\fm}
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of this function, which we can call $V\_REF$.
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Taken as a component for use in FMEA/FMMD our function has
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two failure modes. We can therefore treat it as a generic component, $Read\_ADC$,
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by stating:
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$$ fm(Read\_ADC) = \{ CHAN\_NO, VREF \} $$
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As we have a failure mode model for our function, we can now use it in conjunction with
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with the ADC hardware {\dc} CMATV, to form a {\fg} $G_2$, where $G_2 =\{ CMSTV, Read\_ADC \}$.
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We now analyse this hardware/software combined {\fg}.
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{
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\tiny
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\begin{table}[h+]
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\caption{$G_2$: Failure Mode Effects Analysis} % title of Table
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\label{tbl:radc}
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\begin{tabular}{|| l | c | l ||} \hline
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% \textbf{Failure} & \textbf{failure} & \textbf{Symptom} \\
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% \textbf{Scenario} & \textbf{effect} & \textbf{RADC } \\ \hline
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\textbf{Failure} & \textbf{Failure } & \textbf{Derived Component} \\
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\textbf{cause} & \textbf{Effect} & \textbf{Failure Mode} \\
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\hline
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1: ${CHAN\_NO}$ & wrong voltage & $VV\_ERR$ \\
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& read & \\ \hline
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2: ${VREF}$ & ADC volt-ref & $VV\_ERR$ \\
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& incorrect & \\ \hline \hline
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3: $CMATV_{V\_ERR}$ & voltage value & $VV\_ERR$ \\
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& incorrect & \\ \hline
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4: $CMATV_{HIGH}$ & ADC may read & $HIGH$ \\
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& wrong channel & \\ \hline
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5: $CMATV_{LOW}$ & output low & $LOW$ \\ \hline
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\hline
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\hline
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\end{tabular}
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\end{table}
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}
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We now collect the symptoms of failure for the {\fg} analysed (see table~\ref{tbl:radc})
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as $\{ VV\_ERR, HIGH, LOW \}$. We can add as well the violation of the postcondition
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for the function.
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This postcondition, {\em /* ensure: value is voltage input to within 0.1\% */ },
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corresponds to $VV\_ERR$, and is already in the {\fm} set for this {\fg}.
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We can now create a {\dc} called $RADC$ thus: $$RADC = \; \derivec(G_2)$$ which has the following
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{\fms}:
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$$ fm(RADC) = \{ VV\_ERR, HIGH, LOW \} .$$
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\paragraph{Functional Group - Software - voltage to per mil - VTPM }
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This function sits on top of the $RADC$ {\dc} determined above.
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We look at the pre-conditions for the function $read\_4\_20\_input$ , % which we can call $RI$
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to determine its {\fms}.
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Its pre-condition is, {\em /* require: input from ADC to be between 0.88 and 4.4 volts */}.
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We can map this violation of the pre-condition, to the {\fm} VRNGE; %As this function has one pre-condition
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we can state,
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$$ fm(read\_4\_20\_input) = \{ VRNGE \} .$$
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We can now form a functional group with the {\dc} $RADC$ and the
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software component $read\_4\_20\_input$, i.e. $G_3 = \{read\_4\_20\_input, RADC\} $.
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{
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\tiny
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\begin{table}[h+]
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\caption{$G_3$: Read\_4\_20: Failure Mode Effects Analysis} % title of Table
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\label{tbl:r420i}
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\begin{tabular}{|| l | c | l ||} \hline
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% \textbf{Failure} & \textbf{failure} & \textbf{Symptom} \\
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% \textbf{Scenario} & \textbf{effect} & \textbf{RADC } \\ \hline
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\hline
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\textbf{Failure} & \textbf{Failure } & \textbf{Derived Component} \\
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\textbf{cause} & \textbf{Effect} & \textbf{Failure Mode} \\
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\hline
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1: $RI_{VRGE}$ & voltage & $OUT\_OF\_$ \\
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& outside range & $RANGE$ \\ \hline
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2: $RADC_{VV_ERR}$ & voltage & $VAL\_ERR$ \\
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& incorrect & \\ \hline \hline
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3: $RADC_{HIGH}$ & voltage value & $VAL\_ERR$ \\
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& incorrect & \\ \hline
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4: $RADC_{LOW}$ & ADC may read & $OUT\_OF\_$ \\
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& wrong channel & $RANGE$ \\ \hline
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\hline
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\hline
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\end{tabular}
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\end{table}
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}
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The failure symptoms for the {\fg} are $\{OUT\_OF\_RANGE, VAL\_ERR\}$.
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The postcondition for the function $read\_4\_20\_input$, {\em /* ensure: value is proportional (0-999) to the
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4 to 20mA input */} corresponds to the $VAL\_ERR$ and is already in the set of failure modes.
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% \paragraph{Final Functional Group}
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For single failures these are the two ways in which this function
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can fail. An $OUT\_OF\_RANGE$ will be flagged by the error flag variable.
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The $VAL\_ERR$ will simply mean that the value read is incorrect.
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We can finally make a {\dc} to represent a failure mode model for our function $read\_4\_20\_input$ thus:
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$$ R420I = \; \derivec(G_3) .$$
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This new {\dc} has the following {\fms}:
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$$fm(R420I) = \{OUT\_OF\_RANGE, VAL\_ERR\} .$$
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%
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% Using the derived components, CMATV and VTPM we create
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% a new functional group. This
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% integrates FMEA's from software and eletronics
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% into the same failure mode model.
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We can now represent the software/hardware FMMD analysis
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as a hierarchical diagram, see figure~\ref{fig:eulerswhw}. % see figure~\ref{fig:hd}.
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|
% HTR 27OCT2012 % \begin{figure}[h]
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|
% HTR 27OCT2012 % \centering
|
|
% HTR 27OCT2012 % \includegraphics[width=200pt]{./CH5_Examples/hd.png}
|
|
% HTR 27OCT2012 % % hd.png: 363x520 pixel, 72dpi, 12.81x18.34 cm, bb=0 0 363 520
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% HTR 27OCT2012 % \caption{FMMD hierarchy with hardware and software elements}
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|
% HTR 27OCT2012 % \label{fig:hd}
|
|
% HTR 27OCT2012 % \end{figure}
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|
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|
\begin{figure}[h]
|
|
\centering
|
|
\includegraphics[width=300pt]{./CH5_Examples/eulerswhw.png}
|
|
% eulerswhw.png: 510x344 pixel, 72dpi, 17.99x12.14 cm, bb=0 0 510 344
|
|
\caption{Electronics and Software shown in an integrated failure mode
|
|
model---an Euler diagram showing relationship between {\dcs} determined from electronics and software---the two outermost contours are software functions,
|
|
and the inner two are electronic {\dcs}.}
|
|
\label{fig:eulerswhw}
|
|
\end{figure}
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We can represent %the hierarchy in figure~\ref{fig:hd} algebraically,
|
|
the analysis hierarchy algebraically using the `$\derivec$' function:
|
|
%using the groups as intermediate stages:
|
|
\begin{eqnarray*}
|
|
G_1 &=& \{R,ADC\} \\
|
|
CMATV &=& \;\derivec (G_1) \\
|
|
G_2 &=& \{CMATV, read\_ADC \} \\
|
|
RADC &=& \; \derivec (G_2) \\
|
|
G_3 &=& \{ RADC, read\_4\_20\_input \} \\
|
|
R420I &=& \; \derivec (G_3) \\
|
|
\end{eqnarray*}
|
|
or, a nested definition,
|
|
$$ \derivec \Big( \derivec \big( \derivec(R,ADC), read\_4\_20\_input \big), read\_4\_20\_input \Big). $$
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|
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|
This nested structure means that we have multiple traceable
|
|
stages of failure mode reasoning in our analysis. Traditional FMEA would have only one stage
|
|
of reasoning for each component failure mode.
|
|
|
|
%\clearpage
|
|
\subsection{Conclusion: Software/Hardware FMMD Model}
|
|
|
|
The {\dc} representing the {\ft} reader
|
|
in software shows that by FMMD, we can integrate
|
|
software and electro-mechanical FMMD models.
|
|
With this analysis
|
|
we have a complete `reasoning~path' linking the failures modes from the
|
|
electronics to those in the software.
|
|
Each functional group to {\dc} transition represents a
|
|
reasoning stage.
|
|
%
|
|
Each reasoning stage will have an associated analysis report.
|
|
%
|
|
|
|
|
|
With traditional FMEA methods the reasoning~distance is large, because
|
|
it stretches from the component failure mode to the top---or---system level failure.
|
|
For this reason applying traditional FMEA to software stretches
|
|
the reasoning distance even further. This is exacerbated by the fact that traditional SFMEA is
|
|
performed separately from HFMEA~\cite{sfmea,sfmeaa}, additionally even the software/hardware
|
|
interfacing is treated as a separate FMEA task~\cite{sfmeainterface,embedsfmea,procsfmea}
|
|
|
|
|
|
We now have a {\dc} for a {\ft} input in software.
|
|
Typically, more than one such input could be present in a real-world system.
|
|
Not only have we integrated electronics and software in an FMEA, we can also
|
|
re-use the analysis for each {\ft} input in the system.
|
|
|
|
The unsolved symptoms, or unobservable errors, i.e. $VAL\_ERR$ could be addressed
|
|
by another software function to read other known signals
|
|
via the MUX (i.e. voltage references). This strategy would
|
|
detect ADC\_STUCK\_AT and MUX\_FAIL failure modes.
|
|
|
|
A software specification for a hardware interface will concentrate on
|
|
how to interpret raw readings, or what signals to apply for actuators.
|
|
Using FMMD we can determine an accurate failure model for the interface as well~\cite{sfmeainterface}.
|
|
%
|
|
%Detailing this however, is beyond the scope %and page-count
|
|
%of this paper.
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|
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|
|
%Its solved. Hoooo-ray !!!!!!!!!!!!!!!!!!!!!!!!
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\vspace{20pt}
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%typeset in {\Huge \LaTeX} \today
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