.gitignore

@@ -0,0 +1,20 @@
+#
+#
+#
+# git ignore for latex
+#
+
+*.aux
+*.log
+*.dvi
+*.pdf
+*.lof
+*.lot
+*.toc
+*.*~
+*.bbl
+*.blg
+
+*_paper.tex
+*.txt
+

README.md

@@ -1,8 +0,0 @@
-# ARCHIVE OF PhD files
-
-
-See master branch which is essentially the whole git `thesis` 
-repository as stoed on 'NovaProspect'
-
-
-# 30APR2025 RPC

STUDENT_INFO.txt

@@ -0,0 +1,14 @@
+Your rpc2 user account
+Details about your rpc2 user account are shown below.
+If you don't want to make any changes, just close this tab in your browser.
+Some data used for your computer account is supplied by Registry's Student Database, so changes to that system will affect your user account.
+Your student number is 96002640. 
+
+Your UniCard number is 00121240 (issue number 01).
+
+
+Your email address
+main email address 	R.P.Clark@brighton.ac.uk
+other email address 	rpc2@brighton.ac.uk - this is the address you should use to sign into UniMail
+email forwarding 	This account has an Exchange mailbox, which should not combined with email forwarding. 
+

TO_DO_LIST.txt

@@ -0,0 +1,27 @@
+CH5: finish sigma delta
+CH4: fold in proof read (if it comes in time)
+
+Send CH4: CH5: thesis into supervisors b4 April ends.
+
+Go to Uni the Friday, re-search current software FMEA methods
+and start writing the software fmea papaer. The software fmmd paper
+is in reasonable draft form as it is.
+
+get paper: Software FMEA techniques
+Full text access may be available
+
+To access full text, please use your member or institutional sign in.
+
+    Learn more about subscription options
+    Already purchased? View now
+
+    Forgot Username/Password?
+    Forgot Institutional Username or Password?
+    Athens/Shibboleth
+
+This paper appears in:
+Reliability and Maintainability Symposium, 2000. Proceedings. Annual
+
+
+
+

backup.sh

@@ -0,0 +1,14 @@
+
+rm -rf thesis_back_up*
+
+d=`date | sed 's/:/_/g' | sed 's/ /_/g' `
+echo $d
+
+t=thesis_back_up.$d.tar
+echo  $t
+tar cvfp $t *
+
+gzip $t
+
+ls -l thesis_back_up*
+

embedded_c_book/Binary_Scaling/copy.tex

@@ -0,0 +1,31 @@
+
+
+
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+

embedded_c_book/CH1_introduction/copy.tex

@@ -0,0 +1 @@
+Introduction 

embedded_c_book/Filtering/copy.tex

@@ -0,0 +1,31 @@
+
+
+
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+

embedded_c_book/Inpterrupt_contention/copy.tex

@@ -0,0 +1,31 @@
+
+
+
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+

embedded_c_book/Makefile

@@ -0,0 +1,33 @@
+
+
+
+all: copy bib book
+
+book:
+	pdflatex book
+	makeindex book.glo -s book.ist -t book.glg -o book.gls
+	acroread book.pdf || evince book.pdf
+
+clean:
+	rm book.pdf
+	rm -rf  book.aux  book.blg  book.glo  book.ist  book.lof  book.lot  \
+		book.pdf  book.tex~ book.toc book.bbl  book.glg  book.gls  \
+		book.loa  book.log  book.out  book.tex.backup
+
+bib:
+	pdflatex book # do this first otherwise bibtex gets its knickers in a twist
+	bibtex book
+copy:
+	echo "chapters submake"; sleep 2
+
+#
+#cd CH1_introduction; make copy
+#cd CH2_FMEA; make copy
+#cd CH3_FMEA_criticism; make copy
+#cd CH4_FMMD; make copy
+#cd CH5_Examples; make copy
+#cd CH6_Software_Examples; make copy
+#cd CH7_Evaluation; make copy
+#cd CH8_Conclusion; make copy
+#cd CH8_finsh_appendixes; make copy
+

embedded_c_book/PWM/copy.tex

@@ -0,0 +1,31 @@
+
+
+
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+

embedded_c_book/Self_Checking/copy.tex

@@ -0,0 +1,49 @@
+
+
+\section{Variables Bounds checks}
+
+Variables read are often expected to fall within a certain range.
+A voltage reading for instance might be expected to be, say 2.5V.
+It may be necessary to check this periodically.
+Because of niose and acceptable drift factors of components as they age
+expecting it to read exactly 2.5V would be impractical, and would
+probably cause a nuisance failure at some time in the future.
+
+The solution to this is to apply a range, or a plus minus acceptable value.
+
+$$ diff = signal - expected $$
+
+The absolute value of this difference can be used and compared to
+the acceptable range.
+
+The C ABS macro is useful for this.
+
+\begin{verbatim}
+ #define ABS(x) if (x > 0) : (x) : (-x)
+\end{verbatim}
+
+Care must be taken however when passing parameters.
+
+For instance this may look acceptable in C
+
+\begin{verbatim}
+ if (ABS(signal - expected) > THRESHOLD )
+    raise_error();
+\end{verbatim}
+
+It expands to
+
+\begin{verbatim}
+  if ( signal - expected ? (signal - expected) : -(signal - expected) > THRESHOLD )
+     raise_error();
+\end{verbatim}
+
+What ths has done is put \textbf{-(signal - expected) > THRESHOLD} as the final argument to the macro.
+
+The C operator greater than, $>$, binds higher than than $?:$ so the results you will get will
+not be what you expect. The correct way to perform  put the ABS call in brackets.
+
+\begin{verbatim}
+ if ( (ABS(signal - expected)) > THRESHOLD )
+    raise_error();
+\end{verbatim}

embedded_c_book/SensiblePointers/copy.tex

@@ -0,0 +1,31 @@
+
+
+
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+copy.tex
+

embedded_c_book/book.tex

@@ -0,0 +1,136 @@
+
+\documentclass[a4paper,10pt]{book}
+\usepackage{graphicx}
+\usepackage{fancyhdr}
+\usepackage{multirow}
+\usepackage{tikz} 
+\usetikzlibrary{shapes,snakes}
+\usetikzlibrary{shapes.gates.logic.US,trees,positioning,arrows}
+\usepackage{subfigure}
+\usepackage{amsfonts,amsmath,amsthm}
+\usepackage{algorithm}
+\usepackage{algorithmic}
+\usepackage{lastpage}
+\usepackage{glossary}
+\renewcommand{\baselinestretch}{1.5}
+\makeglossary
+
+%% fix for hyperref bug in algorithm package
+\newcommand{\theHalgorithm}{\thechapter.\arabic{algorithm}}
+\usepackage{ifthen}
+\newboolean{pld}
+\setboolean{pld}{false} % boolvar=true or false
+\newboolean{paper}
+\setboolean{paper}{false} % boolvar=true or false
+\input{style}
+\usepackage{hyperref}
+%\begin{document}
+\pagestyle{fancy}
+\fancyhf{}
+\cfoot{Page \thepage}
+
+\newcommand{\chappap}{chapter}
+
+\begin{document}
+\input{titlepage/titlepage}
+
+\clearpage
+
+%\rhead{{\small\bf Failure Mode Modular De-Composition}}         
+%\rfoot{{\small\bf PhD Thesis : R.P. Clark } }   
+ 
+% Contents
+% --------
+ 
+%\cfoot{Page \thepage}                   % Contents page numbers centred
+ 
+\clearpage
+%\input{colophon/colophon}
+\clearpage
+
+\tableofcontents    
+\listoffigures    
+\listoftables
+\listofalgorithms
+
+%
+\cleardoublepage
+
+% Main text
+% ---------
+
+%
+%\middlefoot{ } \outerfoot{{Page \bf\thepage}} % Body of manual has bolded page
+                                              % numbers at outer edges
+\pagenumbering{arabic}                        % Arabic page numbers hereafter
+\cfoot{Page \thepage\ of \pageref{LastPage}}
+\lfoot{}  %% Year keeps fucking incrementing
+\rfoot{R.P.Clark \today}
+\lhead{Left Header}
+\rhead{Right Header}
+%\begin{document}
+
+%\typeout{>>--------------------->> introduction}
+\chapter{Introduction}
+\input{CH1_introduction/copy}
+
+\chapter{Self Checking}
+\input{Self_Checking/copy}
+
+\chapter{Monitors and instrument loops}
+\input{Monitors_intrument_loops/copy}
+\chapter{Binary Scaling}
+\input{Binary_Scaling/copy}
+\chapter{Filtering/smoothing}
+\input{Filtering/copy}
+\chapter{Reading Voltages}
+\input{Stddev/copy}
+\chapter{PWM}
+\input{PWM/copy}
+\chapter{Interrupt Contention}
+\input{Inpterrupt_contention/copy}
+\chapter{Sensible use of Pointers}
+\input{SensiblePointers/copy}
+
+
+
+\appendix
+%\input{appendixes/detailed_analysis}
+%\input{appendixes/formal}
+%\input{appendixes/algorithmic}
+
+\nocite{alggraph}
+\nocite{ince}
+\nocite{f77}
+
+%%% ONLY NEEDED IF WE HAVE APPENDIXES
+%\chapter{Conclusion}
+%\input{CH8_finish_appendixes/copy}
+
+
+%\chapter{FMMD tool : Design Issues}
+%
+%reference the MSC document and describe the Java extension classes.
+%Software documentation for fmmd tool.
+%
+%\typeout{ ----------------  Euler Diagrams represented as graphs}
+%\chapter {Euler Diagrams \\ Represented as graphs}
+%\input{eulerg/eulerg}
+%
+%\chapter{Fast Zone Discrimination Algorithm}
+%\input{fzd/fzd}
+%
+%\chapter{Milli Volt Amp with Safety Resistor}
+%\input{millivoltamp/millivoltamp}
+%
+%\chapter{A detailed look at the safety systems required by industrial burner controller}
+%\input{burner/burner}
+%%\glossary{name={test glossary name}, description={test glossary entry description}}
+
+\printglossary
+\addcontentsline{toc}{chapter}{Glossary}
+
+\bibliographystyle{plain}
+\bibliography{../mybib}
+
+\end{document}

embedded_c_book/fo_filter/fo_filter.c

@@ -0,0 +1,74 @@
+#include <stdio.h>
+
+/*
+ * compile with: gcc fo_filter.c -o fo_filter 
+ * run as      : $ ./fo_filter
+ *
+ * shows how the standard lp first order filter, give a steady signal
+ * truncates it and gives a low result
+ *
+ */
+short int threeup_filter, pa2_an2;
+short int naive_filter;
+double fp;
+
+#define INT16   short int
+INT16 filter16(INT16 var, int depth);
+#define ADRES 0x1FC
+
+main()
+{
+
+    int i;
+    INT16 var,fvar, threeup_result;
+
+    var = ADRES;
+
+    for (i = 0; i < 150; i++) {
+
+        fp = (fp * 7.0 + (double) ADRES) / 8.0;
+
+        naive_filter = (naive_filter * 7 + ADRES) / 8;    // old filter 
+
+        threeup_filter = (((threeup_filter << 3) - threeup_filter) >> 3) + ADRES;
+	threeup_result = (threeup_filter + 4)>>3;
+
+	fvar = filter16(var,3);
+
+        printf(" iteration: %d  naive_filter = %d  threeup_filter = %d  fvar = %d fp = %lf\n", i, naive_filter, threeup_result, fvar, fp);
+    }
+}
+
+
+
+
+
+#define BINARY_FILTER_SCALE 8
+#define ROUND_UP            ((1)<<(BINARY_FILTER_SCALE))
+
+/* with  BINARY_FILTER_SCALE set to 8, depth valid between 2 and 7 */
+/* with a depth of 2 what we are saying is
+ *  * result = (old_result * 3.0 + new_val ) / 4.0)
+ *   * with a depth of 3
+ *    * result = (old_result * 7.0 + new_val ) / 8.0)
+ *     *  */
+INT16 filter16(INT16 var, int depth)
+{
+
+    long v = var, v2;
+    static long oldv;
+
+    printf(" v = %lx oldv = %lx: ", v, oldv);
+    v <<= BINARY_FILTER_SCALE;  // scale up
+    printf(" v = %lx : ", v);
+    v2 = (oldv << depth) - oldv + v;
+    // now round-up
+    v2 += ROUND_UP;
+    v2 >>= depth;
+    oldv = v2;
+    printf(" v = %lx oldv = %lx ", v, oldv);
+
+    return (v2 >> BINARY_FILTER_SCALE);
+
+
+}

embedded_c_book/titlepage/titlepage.tex

@@ -0,0 +1,61 @@
+
+% Title page
+% ----------
+%
+%\middlefoot{ }                               % No page number on title page
+\begin{center}
+
+\pagenumbering{roman}                        % Lower case roman page numbers
+{\LARGE \bf Embedded C  }
+
+\vspace{2.15in}
+
+{
+ \bf Embedded C
+}
+
+%\vbox
+%{
+%Modularising FMEA has benefits of rigor, re-usability of analysis
+%and the integration of hardware and software in failure effects modelling.
+%%} 
+
+%     
+\rule{380pt}{1pt}
+
+
+\vspace{1.15in}
+
+{\LARGE \bf ........ HippyDippy of Brighton }
+
+\vspace{0.3in}
+\rule{120pt}{1pt}
+\vspace{0.1in}
+ 
+{\bf ...........}
+
+\vspace{0.1in}
+\rule{120pt}{1pt}
+\vspace{0.3in}
+ 
+\vspace{1.0in}
+ 
+ 
+{\large Author : R.P. Clark  -  \today }
+ 
+\rule{380pt}{1pt}
+
+\end{center}
+
+%\vspace{1.0in}
+%\begin{verbatim} 
+%             Robin Clark     
+%             68 Vale Avenue,                    
+%             Brighton, 
+%             East Sussex  
+%                       
+%\end{verbatim}
+
+
+
+%

git_notes.txt

@@ -0,0 +1,25 @@
+
+
+
+
+
+# SIDE BY SIDE GIT DIFF
+#
+
+my_diff.sh
+-----------------------
+ kompare  "$2" "$5"
+-----------------------
+git config --global diff.external ~/scripts/my_diff.sh
+
+useful command:
+
+git diff HEAD^ -- papers/fmmd_software_hardware/software_fmmd.tex
+
+from: http://stackoverflow.com/questions/7669963/how-can-i-get-a-side-by-side-diff-when-i-do-git-diff
+
+
+
+#
+#
+# NEXT GIT TOP TIP

minutes/thesis_structure_meeting_13JAN2012.txt

@@ -0,0 +1,38 @@
+
+Thesis Structure Meeting -- Failure Mode Modular De-Composition
+
+The meeting decided that the thesis should comprise of
+seven chapeters with the following subject areas.
+
+1.	Introduction - overview of the subject area
+
+2.	FMEA - general description, variants  and context
+
+3.	Weaknesess of FMEA
+
+4.	FMMD - proposed solution, modularisation of FMEA
+
+	* Hierarchical modelling - functional groups --> derived components etc
+	* Symptom extraction process
+	* Unitary State failure modes -- only one failure mode may be active at 
+          a given time in a component -- definition.
+
+5.	Examples for various levels of problems, 
+
+	* using examples set by C Garrett, 
+        * the PT100 temperature sensing circuit (double failures analysed)
+	* A larger complete electronics example (possible an anbalog PID controller)
+
+6.	Evaluation of FMMD
+
+	* Unitary State failure modes.
+	* Complexity Comparison
+	* Problems in modelling for FMMD.
+
+7.	Conclusion and further work.
+
+	* Software modelled in terms of failure modes - follow contract programming paradigm
+        * Hardware modelled in terms of failure modes (perhaps look at a servo motor, linkage, gearbox motor etc).
+
+A goal has been set to submit these chapters, writing the introduction last, 
+by October 2012.

old_thesis/Makefile

@@ -0,0 +1,17 @@
+
+PNG = 
+
+pdf:
+	pdflatex thesis
+	acroread thesis.pdf &
+
+
+bib:
+	bibtex thesis
+	makeindex thesis.glo -s thesis.ist -t thesis.glg -o thesis.gls
+
+
+puzzle:
+	pdflatex puzzle.tex
+	pdflatex puzzle.tex
+	acroread puzzle.pdf

old_thesis/burner/.gitignore

@@ -0,0 +1,15 @@
+#
+#
+#
+# git ignore for latex
+#
+
+*.aux
+*.log
+*.dvi
+*.pdf
+*.lof
+*.lot
+*.toc
+*.*~
+

old_thesis/burner/Makefile

@@ -0,0 +1,17 @@
+
+#
+# Make the propositional logic diagram a paper
+#
+
+
+paper:	paper.tex burner_paper.tex
+	#latex paper.tex
+	#dvipdf paper     pdflatex cannot use eps ffs
+	pdflatex paper.tex
+	okular paper.pdf
+
+
+# Remove the need for referncing graphics in subdirectories
+#
+burner_paper.tex: burner.tex
+	cat burner.tex | sed 's/burner\///' > burner_paper.tex

old_thesis/burner/burner.tex

@@ -0,0 +1,70 @@
+%
+% Make the revision and doc number macro's then they are defined in one place
+
+\ifthenelse {\boolean{paper}}
+{
+
+\begin{abstract}
+things can get very abstract
+\end{abstract}
+
+}
+{
+\section{Overview}
+}
+
+\section{Overview of A Burner Controller : Safety Perspective}
+
+\section{Background to the Industrial Burner Safety Analysis Problem}
+
+An industrial burner is a good example of a safety critical system.
+It has the potential for devistating explosions due to boiler overpressure, low water, or
+ignition of an explosive mixture, and, because of the large amounts of fuel used,
+is also a fire hazard. Industrial boilers are often left running unattended 
+for long periods of time (typically days).  
+
+To add to these problems
+Operators are often under pressure to keep them running. A boiler supplying
+heat to a large greenhouse complex could ruin crops
+should it go off-line. Similarly a production line relying on heat or steam
+can be very expensive in production down-time should it fail.
+This places extra responsibility on the burner controller.
+
+
+These are common place and account for a very large proportion of the enery usage
+in the world today (find and ref stats)
+Industrial burners are common enough to have different specific standards
+written for the fuel types they use \ref{EN298} \ref{EN230} \ref{EN12067}.
+
+A modern industrial burner has mechanical, electronic and software
+elements, that are all safety critical. That is to say
+unhandled failures could create dangerous faults.
+
+A more detailed description of industrial burner controllers
+is dealt with in chapter~\ref{burnercontroller}.
+
+
+Systems such as industrial burners have been partially automated for some time.
+A mechanical cam arrangement controls the flow of air and fuel for the range of
+firing rate (output of the boiler).
+
+These mechanical systems could suffer failures (such as a mechanical linkage beoming
+detached) and could then operate in a potentially dangerous state.
+
+More modern burner controllers use a safety critical computer controlling
+motors to operate the fuel and air mixture and to control the safety 
+valves.
+
+In working in the industrial burner industry and submitting product for
+North American and European safety approval, it was apparent that
+formal techniques could be applied to aspects of the ciruit design.
+Some safety critical circuitry would be subjected to thought experiments, where 
+the actions of one or more components failing would be examined.
+As a simple example a milli-volt input could become disconnected.
+A milli-volt input is typically amplified so that its range matches that
+of the A->D converter that you are reading. were this signal source to become disconnected
+the systems would see a floating, amplified signal.
+A high impedance safety resistor can be added to the circuit,
+to pull the signal high (or out of nornal range) upon disconnection.
+The system then knows that a fault has occurred and will not use  
+that sensor reading (see \ref{fig:millivolt}). 

old_thesis/burner/mybib.bib

@@ -0,0 +1,404 @@
+%
+%
+% $Id: mybib.bib,v 1.5 2008/12/18 17:05:23 robin Exp $
+%
+%
+
+@TechReport{db,
+ author = {R Clark, D Legge},
+ title = {ETC6000 Daughterboard Design notes},
+ institution = {ETC HR221850},
+ year = {2004},
+ key = {},
+ OPTtype = {},
+ OPTnumber = {},
+ OPTaddress = {},
+ OPTmonth = {},
+ OPTnote = {},
+ OPTannote = {},
+ OPTurl = {},
+ OPTdoi = {},
+ issn = {HR221850},
+ OPTlocalfile = {},
+ OPTabstract = {},
+}
+
+@TechReport{mil1991,
+ author = {U.S. Department of Defence},
+ title = {Reliability Prediction of Electronic Equipment},
+ institution = {DOD},
+ year = {1991},
+ key = {MIL-HDBK-217F},
+ OPTtype = {},
+ OPTnumber = {},
+ OPTaddress = {},
+ OPTmonth = {},
+ OPTnote = {},
+ OPTannote = {},
+ OPTurl = {},
+ OPTdoi = {},
+ OPTissn = {},
+ OPTlocalfile = {},
+ OPTabstract = {},
+}
+
+@Manual{tlp181,
+ title = {TLP 181 Datasheet},
+ key = {TOSHIBA Photocoupler GaAs Ired & Photo−Transistor},
+ author = {Toshiba inc.},
+ OPTorganization = {},
+ %address = {http://www.toshiba.com/taec/components2/Datasheet\_Sync//206/4191.pdf},
+ OPTedition = {},
+ OPTmonth = {},
+ year = {2009},
+OPTnote = {},
+ OPTannote = {},
+ OPTurl = {},
+ OPTdoi = {},
+OPTissn = {},
+ OPTlocalfile = {},
+ OPTabstract = {},
+}
+
+
+
+
+@Manual{pic18f2523,
+ title = {PIC18F2523 Datasheet},
+ OPTkey = {},
+ author = {Microchip inc},
+ OPTorganization = {},
+ address = {http://ww1.microchip.com/downloads/en/DeviceDoc/39755c.pdf},
+ OPTedition = {},
+ OPTmonth = {},
+ year = {2009},
+ OPTnote = {},
+ OPTannote = {},
+ OPTurl = {},
+ OPTdoi = {},
+ OPTissn = {},
+ OPTlocalfile = {},
+ OPTabstract = {},
+}
+
+
+@Book{wt,
+ title = {Water Treatment Essentials for Boiler Plant Operation},
+ publisher = {Mc Graw Hill ISBN 0-07-048291-5},
+ year = {1997},
+ author = {Robert G Nunn},
+ ALTALTeditor = {},
+ OPTkey = {},
+ OPTvolume = {},
+ OPTnumber = {},
+ OPTseries = {},
+ OPTaddress = {},
+ OPTedition = {},
+ OPTmonth = {},
+ OPTnote = {},
+ OPTannote = {},
+ OPTurl = {},
+ OPTdoi = {},
+ OPTissn = {ISBN 0-07-048291-5},
+ OPTlocalfile = {},
+ OPTabstracts = {},
+}
+
+@TechReport{pcbAI222562,
+ author = {C Talmay},
+ title = {Circuit Schematic TDS Daughterboard AI222562},
+ institution = {ETC},
+ year = {2010},
+ OPTkey = {},
+ OPTtype = {},
+ OPTnumber = {AI222562},
+ OPTaddress = {},
+ OPTmonth = {},
+ OPTnote = {},
+ OPTannote = {},
+ OPTurl = {},
+ OPTdoi = {},
+ OPTissn = {},
+ OPTlocalfile = {},
+ OPTabstract = {},
+}
+
+@TechReport{spiraxsarco,
+ author = {Spirax Sarco},
+ title = {http://www.spiraxsarco.com/resources/steam-engineering-tutorials.asp},
+ institution = {Spirax Sarco},
+ year = {2010},
+ OPTkey = {},
+ OPTtype = {},
+ OPTnumber = {},
+ OPTaddress = {},
+ OPTmonth = {},
+ OPTnote = {},
+ OPTannote = {},
+ OPTurl = {},
+ OPTdoi = {},
+ OPTissn = {},
+ OPTlocalfile = {},
+ OPTabstract = {},
+}
+
+@Book{aoe,
+ title = {The Art of Electronics},
+ publisher = {Cambridge},
+ year = {1989},
+ author = {Paul Horowitz, Winfield Hill},
+ %author = {},
+ OPTkey = {},
+ OPTvolume = {},
+ OPTnumber = {},
+ OPTseries = {},
+ OPTaddress = {},
+ OPTedition = {2nd},
+ OPTmonth = {},
+ OPTnote = {},
+ OPTannote = {},
+ OPTurl = {},
+ OPTdoi = {},
+ OPTissn = {ISBN 0-521-37095-7},
+ OPTlocalfile = {},
+ OPTabstracts = {},
+}
+
+@TechReport{eurothermtables,
+ author = {},
+ title = {Thermocouple Emf TABLES and PLATINUM 100 RESISTANCE THERMOMETER TABLES},
+ institution = {Eurotherm},
+ year = {1973},
+ OPTkey = {},
+ OPTtype = {},
+ OPTnumber = {},
+ OPTaddress = {},
+ OPTmonth = {June},
+ OPTnote = {Bulletin TT-1},
+ OPTannote = {},
+ OPTurl = {},
+ OPTdoi = {},
+ OPTissn = {},
+ OPTlocalfile = {},
+ OPTabstract = {},
+}
+
+@MISC{iso639-1,
+ title = "ISO 639-1: Code for the Representation of Names of Languages",
+ author = "International Standardization Organization",
+ howpublished = "http://www.loc.gov/standards/iso639-2/criteria1.html"
+ year = "1998"
+}
+
+@MISC{nano-x,
+ title = "The nano-X windowing system",
+ author = "Greg Haerr",
+ howpublished = "http://www.microwindows.org/"
+ year = "2003"
+}
+
+
+
+
+@MISC{X11,
+ title = "The XFree86 Project, Inc",
+ author = "Open Source",
+ howpublished = "http://www.xfree86.org/"
+ year = "1992"
+}
+
+
+http://www.xfree86.org/
+
+@MISC{iso639-2,
+ title = "ISO 639-2: Code for the Representation of Names of Languages",
+ author = "International Standardization Organization",
+ howpublished = "http://www.loc.gov/standards/iso639-2/criteria1.html"
+ year = "1998"
+}
+
+
+@misc{ touchscreenprod,
+       author = "M. Thirsk",
+       title = "Touchscreen Production Procedure : HR~222165",
+       howpublished = "Internal ETC Document",
+       year = "2008" };
+
+
+@misc{ touchscreensoftware,
+       author = "ETC Software Dept.",
+       title = "Touchscreen Software released to Production : HR~222162",
+       howpublished = "Internal ETC Software (medium: 2 MMC cards)",
+       year = "2008" };
+
+@misc{ touchscreengui,
+       author = "D.J. Legge, R.P.Clark",
+       title = "Touchscreen GUI Design Document : HR~222163",
+       howpublished = "Internal ETC Document",
+       year = "2008" };
+
+
+@misc{ gumstix,
+       author = "Gumstix Inc",
+       title = "Gumstix Home Page",
+       howpublished = "WEB http://www.gumstix.com/",
+       year = "2008" };
+
+
+@misc{ fltk,
+       author = "FLTK open Source Developers",
+       title = "Fast Light Toolkit",
+       howpublished = "WEB http://www.fltk.org/",
+       year = "2008" };
+
+
+@Book{ldd,
+author = {Jonathon Corbet},
+ALTeditor = {Alessandro Rubini},
+ALTeditor = {Greg Kroah-Hartman},
+title = {Linux Device Drivers},
+publisher = {O'Reilly ISBN 0-596-00590-3},
+year = {1998},
+OPTkey = {ISBN 0-596-00590-3},
+OPTvolume = {},
+OPTnumber = {},
+OPTseries = {linux},
+OPTaddress = {},
+OPTedition = {3rd},
+OPTmonth = {},
+OPTnote = {},
+OPTannote = {},
+OPTurl = {www.oreilly.com},
+OPTdoi = {},
+OPTissn = {},
+OPTlocalfile = {},
+OPTabstract = {}
+};
+
+
+@Book{bash,
+author = {Carl Albing},
+title = {Bash Cookbook},
+publisher = {O'Reilly ISBN 0-596-52678-4},
+year = {2007},
+OPTkey = {ISBN 0-596-52678-4},
+OPTvolume = {},
+OPTnumber = {},
+OPTseries = {unix/linux},
+OPTaddress = {},
+OPTedition = {},
+OPTmonth = {},
+OPTnote = {},
+OPTannote = {},
+OPTurl = {www.oreilly.com},
+OPTdoi = {},
+OPTissn = {},
+OPTlocalfile = {},
+OPTabstract = {}
+};
+
+@Book{sedawk,
+author = {Dale Dougherty, Arnold Robbins},
+title = {Sed and Awk},
+publisher = {O'Reilly ISBN 1-56592-225-5},
+year = {1997},
+OPTkey = {ISBN 1-56592-225-5},
+OPTvolume = {},
+OPTnumber = {},
+OPTseries = {unix/linux},
+OPTaddress = {},
+OPTedition = {},
+OPTmonth = {},
+OPTnote = {},
+OPTannote = {},
+OPTurl = {www.oreilly.com},
+OPTdoi = {},
+OPTissn = {},
+OPTlocalfile = {},
+OPTabstract = {}
+};
+
+@Book{bels,
+author = {Karim Yaghmour},
+title = {Building Embedded LINUX systems},
+publisher = {O'Reilly ISBN ISBN 0-596-00222-X},
+year = {2003},
+OPTkey = {ISBN 0-596-00222-X},
+OPTvolume = {},
+OPTnumber = {},
+OPTseries = {linux},
+OPTaddress = {},
+OPTedition = {3rd},
+OPTmonth = {},
+OPTnote = {},
+OPTannote = {},
+OPTurl = {www.oreilly.com},
+OPTdoi = {},
+OPTissn = {},
+OPTlocalfile = {},
+OPTabstract = {}
+};
+
+@Book{can,
+author = {Olaf Pfeiffer},
+ALTeditor = {Andrew Ayre},
+ALTeditor = {Christian Keydel},
+title = {Embedded networking with CAN and CANopen},
+publisher = {RTC ISBN 0-929392-78-7},
+year = {2003},
+OPTkey = { },
+OPTvolume = {},
+OPTnumber = {},
+OPTseries = {Embedded Systems},
+OPTaddress = {},
+OPTedition = {1st},
+OPTmonth = {},
+OPTnote = {},
+OPTannote = {},
+OPTurl = {www.rtcbooks.com},
+OPTdoi = {},
+OPTissn = {},
+OPTlocalfile = {},
+OPTabstract = {}
+};
+
+@Article{article,
+author = {dd},
+title = {dd},
+journal = {dd},
+year = {2008},
+OPTkey = {},
+OPTvolume = {},
+OPTnumber = {},
+OPTpages = {1,2},
+OPTmonth = {JAN},
+OPTnote = {},
+OPTannote = {},
+OPTurl = {},
+OPTdoi = {},
+OPTissn = {},
+OPTlocalfile = {},
+OPTabstract = {}
+};
+
+@Book{sqlite,
+author = {Micheal Owens},
+title = {The definitive guide to SQLite},
+publisher = {Apres ISBN 1-59059-673-0},
+year = {2006},
+OPTkey = {},
+OPTvolume = {},
+OPTnumber = {},
+OPTseries = {Databases/SQLite},
+OPTaddress = {},
+OPTedition = {},
+OPTmonth = {},
+OPTnote = {},
+OPTannote = {},
+OPTurl = {},
+OPTdoi = {},
+OPTissn = {},
+OPTlocalfile = {},
+OPTabstract = {}
+};
+

old_thesis/burner/paper.tex

@@ -0,0 +1,33 @@
+
+\documentclass[a4paper,10pt]{article}
+\usepackage{graphicx}
+\usepackage{fancyhdr}
+\usepackage{tikz}
+\usepackage{amsfonts,amsmath,amsthm}
+
+\usepackage{ifthen}
+\newboolean{paper}
+\setboolean{paper}{true} % boolvar=true or false
+
+
+\input{../style}
+
+%\newtheorem{definition}{Definition:}
+
+\begin{document}
+\pagestyle{fancy}
+
+\outerhead{{\small\bf PT100 FMMD analysis}}         
+%\innerfoot{{\small\bf R.P. Clark } }   
+                                              % numbers at outer edges
+\pagenumbering{arabic}                        % Arabic page numbers hereafter
+\author{R.P.Clark}
+\title{PT100 FMMD analysis}
+\maketitle 
+\input{burner_paper}
+
+\bibliographystyle{plain}
+\bibliography{vmgbibliography,mybib}
+
+\today
+\end{document}

old_thesis/common_mode/Makefile

@@ -0,0 +1,20 @@
+
+#
+
+
+paper:	paper.tex common_mode_paper.tex
+	#latex paper.tex
+	#dvipdf paper     pdflatex cannot use eps ffs
+	pdflatex paper.tex
+	mv paper.pdf common_mode.pdf
+	okular common_mode.pdf
+
+
+
+# Remove the need for referncing graphics in subdirectories
+#
+common_mode_paper.tex: common_mode.tex paper.tex
+	cat common_mode.tex | sed 's/common_mode\///' > common_mode_paper.tex
+
+bib:	
+	bibtex paper

old_thesis/common_mode/common_mode.tex

@@ -0,0 +1,100 @@
+
+
+
+
+\ifthenelse {\boolean{paper}}
+{
+\abstract{ 
+This paper describes how the Failure Mode Modular De-composition (FMMD) methodology 
+can be applied to the problems of common mode failure
+analysis.
+%
+Common mode failures are often difficult to
+determine in embedded real time systems.
+%
+Environmental effects can lead to component failure
+modes, that can occur in separate sub-systems
+in a system, but interact to create unexpected fault.
+% WHAT IS DID
+The FMMD methodology can model and warn for two types of common mode failures.
+Failures caused by separate sub-systems relying on 
+a common component, and environmental effects that can induce failure
+modes in components in separate sub-systems.
+% WHAT I FOUND
+From the FMMD data model it is possible to link the environmental effects
+and ensure determine the weak points in a design, where the failure modes may interact.
+For the component dependency case, the dependent component 
+can be automatically highlighted by traversing the data model.
+% WHY YOU WOULD WANT TO READ IT
+This feature of FMMD proides another tool in the safety engineers
+repotiore, one that can shake out difficult to find common mode failure
+effects. 
+}
+}
+{
+\paragraph{Chapter overview}
+This chapter describes how the % Failure Mode Modular De-composition (FMMD) 
+FMMD methodology 
+can be applied to the problems of common mode failure
+analysis.
+%
+Common mode failures are often difficult to
+determine in embedded real time systems.
+%
+Environmental effects can lead to component failure
+modes, that can occur in separate sub-systems
+in a system, but interact to create unexpected fault.
+% WHAT IS DID
+The FMMD methodology can model and warn for two types of common mode failures.
+Failures caused by separate sub-systems relying on 
+a common component, and environmental effects that can induce failure
+modes in components in separate sub-systems.
+% WHAT I FOUND
+From the FMMD data model it is possible to link the environmental effects
+and ensure determine the weak points in a design, where the failure modes may interact.
+For the component dependency case, the dependent component 
+can be automatically highlighted by traversing the data model.
+% WHY YOU WOULD WANT TO READ IT
+This feature of FMMD proides another tool in the safety engineers
+repotiore, one that can shake out difficult to find common mode failure
+effects. 
+
+}
+
+ 
+\section{Introduction}
+
+{\huge MIGHT BECOME A PAPER IN ITS OWN RIGHT. WILL PROB BE PART OF DATA MODEL CHAPTER FOR NOW 22NOV2010 }
+
+\ifthenelse {\boolean{paper}}
+{
+paper
+}
+{
+chapter
+}
+
+
+Outline the fmmd process.
+
+
+Show modules with common dependencies (like on a power supply, a powersupply could have a fault
+like nopisy output)
+
+
+Trace a theoretical example and show how FMMD detects this (common dependency - like two
+{\dc}s being depemdent on the same failure mode.
+
+
+Then show an environmental effect, such as temperature and how 
+it can induce faults in sepatate modulkes that
+would not be obviously related.
+
+Trace a theoretical example and show how FMMD detects this
+i.e. the environmental factor affecting both systems and causing a problem.
+
+
+what about the third way it can be affected.
+
+Like a chain of relays...... all could get welded .... think about that one.....
+

old_thesis/common_mode/paper.tex

@@ -0,0 +1,31 @@
+
+\documentclass[a4paper,10pt]{article}
+\usepackage{graphicx}
+\usepackage{fancyhdr}
+\usepackage{tikz}
+\usepackage{amsfonts,amsmath,amsthm}
+\input{../style}
+\usepackage{ifthen}
+\newboolean{paper}
+\setboolean{paper}{true} % boolvar=true or false
+
+
+%\newtheorem{definition}{Definition:}
+
+\begin{document}
+\pagestyle{fancy}
+
+%\outerhead{{\small\bf Statistical Basis for Current Static Analysis Methodologies}}         
+%\innerfoot{{\small\bf R.P. Clark } }   
+                                              % numbers at outer edges
+\pagenumbering{arabic}                        % Arabic page numbers hereafter
+\author{R.P.Clark}
+\title{Modelling and Uncovering Common Mode Failures using FMMD}
+\maketitle 
+\input{common_mode_paper}
+
+\bibliographystyle{plain}
+\bibliography{../vmgbibliography,../mybib}
+
+\today
+\end{document}

old_thesis/component_failure_modes_definition/.gitignore

@@ -0,0 +1,15 @@
+#
+#
+#
+# git ignore for latex
+#
+
+*.aux
+*.log
+*.dvi
+*.pdf
+*.lof
+*.lot
+*.toc
+*.*~
+

old_thesis/component_failure_modes_definition/Makefile

@@ -0,0 +1,22 @@
+
+#
+# Make the propositional logic diagram a paper
+#
+
+
+paper:	paper.tex component_failure_modes_definition_paper.tex
+	#latex paper.tex
+	#dvipdf paper     pdflatex cannot use eps ffs
+	pdflatex paper.tex
+	mv paper.pdf component_failure_modes_definition_paper.pdf
+	okular component_failure_modes_definition_paper.pdf
+
+
+# Remove the need for referncing graphics in subdirectories
+#
+component_failure_modes_definition_paper.tex: component_failure_modes_definition.tex paper.tex
+	cat component_failure_modes_definition.tex | sed 's/component_failure_modes_definition\///' > component_failure_modes_definition_paper.tex
+
+
+bib:
+	bibtex paper

old_thesis/component_failure_modes_definition/paper.tex

@@ -0,0 +1,43 @@
+
+\documentclass[a4paper,10pt]{article}
+\usepackage{graphicx}
+\usepackage{fancyhdr}
+\usepackage{tikz}
+\usepackage{amsfonts,amsmath,amsthm}
+\usepackage{lastpage}
+\usepackage{ifthen}
+\newboolean{paper}
+\setboolean{paper}{true} % boolvar=true or false
+\input{../style}
+
+
+%\newtheorem{definition}{Definition:}
+
+\begin{document}
+\pagestyle{fancy}
+\fancyhf{}
+%\renewcommand{\chaptermark}[1]{\markboth{ \emph{#1}}{}}
+\fancyhead[LO]{}
+\fancyhead[RE]{\leftmark}
+%\fancyfoot[LE,RO]{\thepage}
+\cfoot{Page \thepage\ of \pageref{LastPage}}
+\rfoot{\today}
+\lhead{Definitions, Components, Functional Groups and Unitary State Failure Mode Sets}
+
+%\outerhead{{\small\bf Definitions, Components, Functional Groups and Unitary State Failure Mode Sets}}         
+%\innerfoot{{\small\bf R.P. Clark } }   
+                                              % numbers at outer edges
+\pagenumbering{arabic}                        % Arabic page numbers hereafter
+\author{R.P.Clark}
+\title{Definitions, Components, Functional Groups and Unitary State Failure Mode Sets}
+\maketitle 
+\input{component_failure_modes_definition_paper}
+
+\bibliographystyle{plain}
+\bibliography{../vmgbibliography,../mybib}
+
+\today
+\end{document}
+
+
+

old_thesis/component_failure_modes_definition/style.tex

@@ -0,0 +1,160 @@
+%
+%============= Definition of {asyoulikeit} page style ======================*
+%
+% Jonathan Burch        This is the terse form  -  expanded, formatted,
+%  20-Jan-1989          commented version in TEX$LATEX:ASYOULIKEIT.FULL
+%
+\catcode`\@=11\def\ps@asyoulikeit{\def\@oddhead{\hbox{}\lp@innerhead
+\lp@headfill\lp@middlehead\lp@headfill\lp@outerhead}\def\@evenhead
+{\hbox{}\lp@outerhead\lp@headfill\lp@middlehead\lp@headfill\lp@innerhead}
+\def\@oddfoot{\hbox{}\lp@innerfoot\lp@footfill\lp@middlefoot\lp@footfill
+\lp@outerfoot}\def\@evenfoot{\hbox{}\lp@outerfoot\lp@footfill\lp@middlefoot
+\lp@footfill\lp@innerfoot}\def\sectionmark##1{}\def\subsectionmark##1{}}
+\def\lp@innerhead{}\def\lp@middlehead{}\def\lp@outerhead{}\def\lp@innerfoot{}
+\def\lp@middlefoot{ {\thepage} }\def\lp@outerfoot{}\def\lp@headfill{\hfil}
+\def\lp@footfill{\hfil}\newcommand{\lp@linefill}{\leaders\hrule height 0.55ex
+depth -0.5ex\hfill}\newcommand{\innerhead}[1]{\def\lp@innerhead{#1}}
+\newcommand{\middlehead}[1]{\def\lp@middlehead{#1}}\newcommand{\outerhead}[1]
+{\def\lp@outerhead{#1}}\newcommand{\innerfoot}[1]{\def\lp@innerfoot{#1}}
+\newcommand{\middlefoot}[1]{\def\lp@middlefoot{#1}}\newcommand{\outerfoot}[1]
+{\def\lp@outerfoot{#1}}\newcommand{\lineheadfill}{\def\lp@headfill
+{\lp@linefill}}\newcommand{\linefootfill}{\def\lp@footfill{\lp@linefill}}
+\newcommand{\blankheadfill}{\def\lp@headfill{\hfill}}\newcommand
+{\blankfootfill}{\def\lp@footfill{\hfill}}\newcommand{\documentnumber}[1]
+{\def\lp@docno{#1}\outerhead{\lp@docno}}\def\lp@docno{}\def\@maketitlet
+{\newpage\null\vskip -14ex\hbox{}\hfill\lp@docno\vskip 13ex\begin{center}
+{\LARGE\@title\par}\vskip 1.5em{\large\lineskip .5em\begin{tabular}[t]{c}
+\@author\end{tabular}\par}\vskip 1em{\large\@date}\end{center}\par\vskip 3em}
+\def\abstract{\if@twocolumn\section*{Abstract}\else\small\begin{center}
+{\bf Abstract\vspace{-.5em}\vspace{0pt}}\end{center}\quotation\fi}\def
+\endabstract{\if@twocolumn\else\endquotation\fi}\ps@asyoulikeit\catcode`\@=12
+%
+%=========== End of {asyoulikeit} page style definition ====================*
+ 
+\DeclareSymbolFont{AMSb}{U}{msb}{m}{n}
+\DeclareMathSymbol{\N}{\mathbin}{AMSb}{"4E}
+\DeclareMathSymbol{\Z}{\mathbin}{AMSb}{"5A}
+\DeclareMathSymbol{\R}{\mathbin}{AMSb}{"52}
+\DeclareMathSymbol{\Q}{\mathbin}{AMSb}{"51}
+\DeclareMathSymbol{\I}{\mathbin}{AMSb}{"49}
+\DeclareMathSymbol{\C}{\mathbin}{AMSb}{"43}
+
+
+% Page layout definitions to suit A4 paper
+\setcounter{secnumdepth}{3}        \setcounter{tocdepth}{4}
+\setlength{\topmargin}{0mm}
+\setlength{\textwidth}{160mm}      \setlength{\textheight}{220mm}
+\setlength{\oddsidemargin}{0mm}    \setlength{\evensidemargin}{0mm}
+%
+% Local definitions
+% -----------------
+\newcommand{\eg}{{\it e.g.}}    
+\newcommand{\etc}{{\it etc.}}
+\newcommand{\ie}{{\it i.e.}}
+\newcommand{\qv}{{\it q.v.}}
+\newcommand{\viz}{{\it viz.}}
+\newcommand{\degs}[1]{$#1^\circ$}                       % Degrees symbol
+\newcommand{\mins}[1]{$#1^{\scriptsize\prime}$}         % Minutes symbol
+\newcommand{\secs}[1]{$#1^{\scriptsize\prime\prime}$}   % Seconds symbol
+\newcommand{\key}[1]{\fbox{\sc#1}}                      % Box for keys
+\newcommand{\modulus}[1]{\ensuremathmode{|#1|}}
+\newcommand{\?}{\_\hspace{0.115em}}                     % Proper spacing for 
+                                                        %   underscore
+\newcommand{\rev}{PA5}
+\newcommand{\etcdoc}{ HR222975 }
+\newcommand{\wlc}{{Water~Level~Controller~Unit}}
+\newcommand{\ft}{{\em 4 $\rightarrow$ 20mA } }
+\newcommand{\tds}{TDS Daughterboard}
+\newcommand{\oc}{$^{o}{C}$}
+\newcommand{\adctw}{{${\mathcal{ADC}}_{12}$}}
+\newcommand{\adcten}{{${\mathcal{ADC}}_{10}$}}
+\newcommand{\ohms}[1]{\ensuremath{#1\Omega}}
+%----- Display example text (#1) in typewriter font
+ 
+%\newcommand{\example}[1]{\\ \smallskip\hspace{1in}{\tt #1}\hfil\\
+%                            \smallskip\noindent}
+% 
+%----- Enclose text (#2) in ruled box of given thickness (#1)
+ 
+\def\boxit#1#2{\vbox{\hrule height #1pt\hbox{\vrule width #1pt\hskip 5pt
+                   \vbox{\vskip 5pt #2 \vskip 5pt}\hskip 5pt
+                   \vrule width #1pt}\hrule height #1pt}}
+ 
+%----- Display boxed warning text (#1)
+ 
+\def\warning#1{\bigskip
+               \setbox1=\vbox{\tolerance=5000\parfillskip=0pt
+               \hsize=3in\noindent#1}
+               \centerline{\boxit{1.0}{\box1}}
+               \bigskip}
+ 
+%----- Definitions to aid display of help text 
+%         (modelled on \item and \itemitem)
+ 
+\def\helpindent#1{\setbox2=\hbox to\parindent{{\it #1}\hfil}
+                  \indent\llap{\box2}\ignorespaces}
+\def\helpitem{\parindent=70pt\par\hang\helpindent}
+\def\helpitemitem{\parindent=70pt\par\indent \parindent=80pt 
+\hangindent2\parindent \helpindent}
+ 
+%----- Tables and footnotes to tables
+%
+\newcommand{\spacerA}{\rule{0mm}{4mm}}
+\newcommand{\spacerB}{\rule[-2mm]{0mm}{5mm}}
+\footnotesep=5mm
+\renewcommand{\footnoterule}{{\small Notes:}}
+
+%% Robin 01AUG2008
+%%
+
+\newcounter{examplec}
+\newcounter{definitionc}
+\newcounter{summaryc}
+
+%\@addtoreset{examplec}{chapter}\renewcommand\theexamplec{\thechapter.arabic{examplec}}
+%\@addtoreset{definitionc}{chapter}
+%\@addtoreset{summaryc}{chapter}
+
+%\renewcommand\examplec{\arabic{examplec}}
+
+%\newenvironment{example}
+%{ 
+% \stepcounter{examplec} \vspace{10pt} \normalfont\bfseries Example:\normalfont\[{\arabic{chapter}.\arabic{examplec}}\]
+%  \normalfont \begin{quote}}{\end{quote}\par}
+%\newenvironment{definition}
+%\newenvironment{example}
+%{
+% \stepcounter{examplec} \vspace{10pt} \normalfont\bfseries Example:\normalfont\[{\arabic{chapter}.\arabic{examplec}}\]
+%  \normalfont \begin{quote}}{\end{quote}\par}
+\usepackage{amsthm}
+
+\newtheorem{example}{Example:}
+\newtheorem{definition}{Definition:}
+\newtheorem*{summary}{Summary:}
+
+
+%
+\newcommand{\Fam}{{\mathbb F}}
+\newcommand{\Pow}{{\mathbb P}}
+\newcommand{\Dis}{{\vee}}
+\newcommand{\Con}{{\wedge}}
+\newcommand{\FMEA}{{\bowtie}}
+%
+\newcommand{\Nat}{{\mathbb N}}
+\newcommand{\Real}{{\mathbb R}}
+\newcommand{\Complex} {{\mathbb C}}
+\newcommand{\Rational} {{\mathbb Q}}
+%
+%\newenvironment{example}
+%{ \stepcounter{examplec} \vspace{10pt} \normalfont\bfseries Example:(\arabic{chapter}.\arabic{examplec})
+%  \normalfont \begin{quote}}{\end{quote}\par}
+
+%
+%\newenvironment{definition}
+%{ \stepcounter{definitionc} \vspace{10pt} \normalfont\bfseries Definition:(\arabic{chapter}.\arabic{definitionc})
+%  \normalfont \begin{quote}}{\end{quote}\par}
+%
+%\newenvironment{summary}
+%{ \vspace{10pt} \normalfont\bfseries Summary:
+%  \normalfont \begin{quote}}{\end{quote}\par}
+%

old_thesis/component_failure_modes_definition/unitary_state.bc

@@ -0,0 +1,45 @@
+# NOT FINISHED YET !!!!
+
+# define a factorial function
+# gives 1 for negative values as well
+define f(x) {
+  if (x>1) {
+    return (x * f (x-1))
+  }
+  return (1)
+}
+
+# determine how many combinations would be dis-allowed
+# from a cardinality constrained powerset
+# given unitary state failure mode conditions
+define uc(c,k,x) {
+ aa = 0;
+ #for(i=2; i<=c; i++)  aa += k * f(k)/(f(i)*f(k-i));
+ if ( c>2 ) {
+	return aa + uc(c-1,k,x);
+ }
+ return aa;
+}
+
+# cardinality constrained powerset
+# how many combinations of cardinality k
+# can we have from c number of components
+# with x number of failure modes
+define ccps(c,k,x) {
+ return f(k*x)/(f(c)*f(k*x-c))
+}
+
+
+
+define us(c,k,x) {
+	a=0;
+	for(i=1;i<=c;i++) a += ccps(i,c,x);
+	# a now holds all combinations 
+	# we must now subtract those combinations
+	# dis-allowed under unitary state conditions.
+	a -= uc(cc,c,x);
+	return a;
+}
+
+
+us(2,3,3);

old_thesis/components_as_plds/.gitignore

@@ -0,0 +1,15 @@
+#
+#
+#
+# git ignore for latex
+#
+
+*.aux
+*.log
+*.dvi
+*.pdf
+*.lof
+*.lot
+*.toc
+*.*~
+

old_thesis/components_as_plds/components_as_plds.tex

@@ -0,0 +1,205 @@
+%\documentclass[a4paper,10pt]{article}
+%\usepackage{graphicx}
+%
+%%opening
+%\title{Electronic Component Failure Analysis}
+%\author{R.P. Clark ~ Energy Technology Control}
+%
+%\bibliographystyle{unsrt} 
+%
+%\begin{document}
+%
+%\maketitle
+%
+
+
+\ifthenelse {\boolean{paper}}
+{
+\begin{abstract}
+This chapter describes the analysis of electrical components in terms of their operational and failure modes.
+When analysed a component can be represented by a set of `fault modes'. 
+The fault modes can be considered as logical states for the component.
+These can be represented as 
+logical states (respresented as contours) in a `propositional logic diagram'.
+Components can then be combined by bringing the contours from 
+several components onto the same diagram.
+Logical analysis of how the failure modes of the components interact 
+in a sub-system or module, can now be undertaken.
+\end{abstract}
+}
+{}
+
+
+%
+\section{Introduction}
+
+Every component in a electrical circuit may fail in several ways.
+The most obvious ways for them to fail are that legs of the 
+circuit become disconnected or are shorted.
+
+Components may fail internally. Some may have failure modes due to environmental factors.
+% SPACE SOLDER EVAPORATING
+% TEMPERATURE EFFECTS SUCH AS INACCURACY, LEAKAGE OF CURRENT ETC
+
+Each component thus has a set of possible failure modes.
+Looking at this independently of cause, we can in the worst case
+consider that any of these errors could occur at any time.
+
+In analysing a circuit we should take into consideration
+all possible failure modes, and where appropriate, how
+these failure modes will affect other components in the circuit.
+
+Safety analysis of components forming critical circuitry, 
+is currently performed using scenario based test cases\cite{en298}, % \cite{gastec}, \cite{tuv}.
+These involve experts checking a circuit for failure modes on a circuit and how these will
+affect the system, based on their expertise.
+Because this is a human process,
+this means that unlikely or very rare test cases may not be considered, but also
+that some test cases may be missed.
+By taking all possible failure modes and laying these out in a logic diagram, 
+a computer can check that an analysis entry has been made for all
+failure mode combinations deemed possible in the diagram.
+
+This paper is concerned with the analysis phase that takes a component
+and from it produces a set of failure modes. PLD diagram configurations
+will be dealt with in the chapter \ref{pldconfig}.
+
+
+\section{A resistor}
+
+A resistor is a simple component, and according to MIL1991 has two failure modes OPEN and SHORT.
+Let us consider what can happen to a resistor soldered onto a PCB.
+It could become de-soldered at one pin or the other. The effect would be the same. The resistor would appear to
+be OPEN circuit.This again would create an OPEN circuit.
+ It could become shorted by some foreign material, or in the production soldering process.
+This again would have the same effect. It would appear to be a SHORT circuit.
+It could be overstressed and burnt out, (by the application of an out of spec current for instance).
+Resistors typically drift slightly in value with temperature. For some applications this may not be important.
+The manufacturers data-sheet will describe the temperature drift co-effecients and operating ranges.
+
+\paragraph{discusion on $P\_CHANGE$ as a resistor failure mode.}
+HERE reference EN298 and RAC.
+Talk about the differences, why en298 only looks for OPEN in most cases
+and OPEN AND SHORT in one but not $P\_CHANGE$ .
+RAC gives $P\_CHANGE$ for single resistors but not for resistor networks.
+It is interesting to determine why this is.
+A network of resistors would be less prone to batch
+problems where a parameter drift would all be in the sam direction (with age perhaps)
+.
+But also a network of resistors means a load sharing where resistors will be
+under less electrical stress.
+
+This is because components in EN298 must be 60\% under any environemntal electrical or mechanical
+stress safe rating as given by a manufacturer.
+Thus a resistor rated for 50V would not be allowed in a ciruit with a 100V rail,
+even though in normal operation, the resistor would never have more than say 30V applied to it.
+
+For most safety critical applications components are downrated, and for resistors this means $P\_CHANGE$
+does not have to be cosidered.
+
+
+We can represent our resistor then to be in four operational states, $R_s = \{ OK, OPEN, SHORT, P\_CHANGE \}$.
+Because we are interested in failure analysis we assume that every component has an OK state
+but this is not of interest. When every component on a board is in the $OK$ state 
+the sub-system will function correctly.
+We are interested in failures and how that affects the sub-system, so we 
+can ignore the $OK$ state and represent our resistor thus for the purpose of fault analysis.
+
+ $$R_s = \{ OPEN, SHORT, P\_CHANGE \}$$
+
+
+This can be represented in a PLD thus 
+ IMAGE HERE
+
+For a resistor in a safety critical regime demanding rigorous downrating, we can model our
+rsistor with 
+
+IMAGE HERE
+$$R_s = \{ OPEN, SHORT \}$$
+
+
+\section{ PNP Transistor }
+
+Each leg open : each leg shorted all combinations.
+Dud no HFE.
+TEMPERATURE, operating range
+{ \huge Look in MIL 1991}
+Resultant failure modes ==
+
+\section { IR Photo-diode}
+
+
+each leg open, each leg shorted combination.
+NO effect or always on.
+
+Resultant failure modes ==
+
+
+% \section{On / Off Switch}
+
+% A simple on / off switch can fail in two ways again, OPEN or SHORT.
+
+
+% 
+% \begin{figure}
+%  \centering
+%  \includegraphics[scale=0.4]{components_as_plds/ir_det.eps}
+%  % ir_det.eps: 0x0 pixel, 300dpi, 0.00x0.00 cm, bb=0 0 582 304
+%  \caption{IR detector circuit}
+%  \label{fig:irdet}
+% \end{figure}
+% 
+% 
+% \section { Sample circuit : An Infra Red Detector }
+% 
+% This circuit for discussion is for a infra-red detector (see figure \ref{fig:ir_det}).
+% It simply draws current through the PNP resistor when infra-red light falls onto the detector.
+% When IR light is detected at the detector, TR1 (IR photo transistor) turns on, lowering the voltage at the base of TR2.
+% This turns on TR2 which raise the voltage at the collector of TR2.
+% A high voltage at the collector of TR2 thus indicates the presence of IR light on the detector.
+% This could be connected to a visible LED or a micro-processor.
+% For the purpose of discussion we are only interested in the detection part of this circuit.
+% By analysing the failure modes for all its components
+% we can can combine the failure modes for all the parts,
+% and analyse how these failures affect the detector.
+% We can also look at how the diagrams can help in the analysis
+% phase.
+% 
+% \subsection { IR detector in use }
+% 
+% In use the IR photo transistor would be mounted on a probe,  used to detect IR.
+% The user would switch the detector on, check that the ON LED was lit,
+% and then use the probe. On detection of IR at the probe the IR detect LED will light.
+% This is a real circuit and has been used for debugging 
+% and validating IR position detection circuitry.
+% 
+% %\bibliography{vmgbibliography,mybib}
+% %Typeset in \ \ {\huge \LaTeX} \ \ on \ \  \today 
+% %\section{}
+% %\end{document}
+% 
+% \subsection{ Components and Fault Modes }
+% 
+% Below is a list of the failure modes that can occur in the 
+% circuit above. A detailed discussion on determing the possible fault modes
+% for components are given in chapter \ref{chapfaultdet}.
+% Failure modes here have been determeined from the MIL 1991\ref{MIL1991} handbook.
+% 
+% \begin{itemize}
+% \item TR1 = \{ OPEN\_CE, SHORT\_CE \}
+% \item TR2 = \{ OPEN\_CE, SHORT\_CE, SHORT\_BE  SHORT\_BC\}
+% \item R1 = \{ OPEN\_R, SHORT\_R \}
+% \item R2 = \{ OPEN\_R, SHORT\_R \}
+% \item D1 = \{ OPEN\_D, SHORT\_D \}
+% \item D2 = \{ OPEN\_D, SHORT\_D \}
+% \item B1 = \{ OPEN\_B, FLAT\_B \}
+% \item SW1 = \{ ALWAYSOPEN\_SW1, ALWAYSCLOSED\_SW1 \}
+% \end{itemize}
+% 
+% With this information we can now begin to analyse the circuit.
+% Firstly we can look at the overall effect of any one component 
+% on the rest of the circuit. After that we can look at combinations
+% of component failure modes.
+% 
+% \subsection{FMEA : Failure Mode Effcets Analysis}
+% 

old_thesis/components_as_plds/resistor_pld.dia

@@ -0,0 +1,277 @@
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+      <dia:attribute name="show_background">
+        <dia:boolean val="false"/>
+      </dia:attribute>
+      <dia:attribute name="line_style">
+        <dia:enum val="2"/>
+      </dia:attribute>
+    </dia:object>
+    <dia:object type="Standard - Text" version="1" id="O2">
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+      </dia:attribute>
+      <dia:attribute name="text">
+        <dia:composite type="text">
+          <dia:attribute name="string">
+            <dia:string>#OPEN#</dia:string>
+          </dia:attribute>
+          <dia:attribute name="font">
+            <dia:font family="sans" style="0" name="Helvetica"/>
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+      <dia:attribute name="text">
+        <dia:composite type="text">
+          <dia:attribute name="string">
+            <dia:string>##</dia:string>
+          </dia:attribute>
+          <dia:attribute name="font">
+            <dia:font family="sans" style="0" name="Helvetica"/>
+          </dia:attribute>
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old_thesis/eulerg/Makefile

@@ -0,0 +1,24 @@
+
+#
+# Make the propositional logic diagram a paper
+#
+SOURCE = eulerg.tex
+
+paper:	paper.tex eulerg_paper.tex $(SOURCE)
+	#cat introduction.tex | sed s/chapter/paper/ > introduction.tex
+	#latex paper.tex
+	#dvipdf paper     pdflatex cannot use eps ffs
+	pdflatex paper.tex
+	mv paper.pdf eulerg_paper.pdf
+	okular eulerg_paper.pdf
+
+
+# Remove the need for referncing graphics in subdirectories
+#
+eulerg_paper.tex: eulerg.tex paper.tex $(SOURCE)
+	cat eulerg.tex | sed 's/eulerg\///'   > eulerg_paper.tex
+
+
+bib: $(SOURCE)	
+	bibtex paper
+	

old_thesis/eulerg/eulerg.tex

@@ -0,0 +1,336 @@
+
+
+
+\ifthenelse {\boolean{paper}}
+{
+\abstract{
+This paper discusses representing Euler Diagrams as graphs, or sets of relationships.
+By representing Euler diagrams in this way,
+algorithms to investigate properties of the diagrams, are possible, without
+having to resort
+to extra unnecessary CPU expensive area operations on the concrete diagrams. 
+
+The graph representations presented here form the basis for several algorithms
+and time saving procedures, implemented in the FMMD analysis tool.
+
+}
+}
+{ %% Introduction
+\section{Introduction}
+This chapter discusses representing Euler Diagrams as graphs, or sets of relationships.
+By representing Euler diagrams in this way,
+algorithms to investigate properties of the diagrams, are possible, without
+having to resort
+to extra unnecessary CPU expensive area operations on the concrete diagrams. 
+
+The graph representations presented here form the basis for several algorithms
+and time saving procedures, implemented in the FMMD analysis tool.
+}
+
+
+\section{Introduction : Euler Diagram }
+
+Classical Euler diagrams consist of closed curves in the plane which are used to represent sets.
+The spatial relationship between the curves defines the set theoretic relationships, as defined below.
+\begin{itemize}
+\item Intersection - if the curves defining the area within curves overlap
+\item Sub-set      - if a curve is enclosed by another
+\item disjoint     - if the curves are separate
+\end{itemize}
+
+The definitions above allow us to read an Euler diagram
+and write down set theory equations.
+The interest here though, is to define relationships between the contours, that allow
+processing and parsing of the diagram without resorting to extra area operations in the concrete plane.
+
+\section{Defining `pair-wise intersection' \\ and `enclosure'}
+
+\begin{figure}[ht]
+\centering
+   \subfigure[Euler Diagram]{
+   \includegraphics[width=200pt,keepaspectratio=true]{./eulerg/eulerg1.jpg}
+   \label{fig:subfig1}
+ }
+
+ \subfigure[Graph Representation]{
+   \includegraphics[width=50pt,keepaspectratio=true]{./eulerg/eulerg_g.jpg}
+   \label{fig:subfig2}
+ }
+
+% \subfigure[Subfigure 3 caption]{
+%   \includegraphics[width=100pt,keepaspectratio=true]{./eulerg/eulerg1.jpg}
+%   \label{fig:subfig3}
+% }
+
+ \caption{An Euler Diagram showing enclosure and Pair-wise Intersection}
+ \label{fig:eulerg1}
+
+\end{figure}
+
+
+
+The set theory term `intersection' can apply to both the curves overlapping and to the sub-set case.
+Intersection in a concrete diagram can mean two curves bisecting.
+For instance in figure \ref{fig:eulerg1} the set theoretic intersection between
+$A$ and $B$ exists, even though the curves do not bisect in the concrete plane.
+
+$$ A \cap B \neq \emptyset $$
+
+as does the intersection $D$ and $E$
+
+$$ D \cap E \neq \emptyset $$
+
+Clearly though these intersections are different, because
+in the $A$, $B$ case 
+$ A \backslash B = \emptyset \wedge B \backslash A \neq \emptyset $
+This is not the case for $D$, $E$ where:
+$ D \backslash E \neq \emptyset \wedge E \backslash D \neq \emptyset $.
+Another way of expressing this is that $D \cap E \neq \emptyset$ and 
+$ A \subset B$.
+
+\paragraph{Enclosure}
+To distinguish between these we can term the $A$, $B$ case to be 
+$A$ `enclosed' by $B$. We can express this as a directed relationship.
+
+$$ B {\enc} A $$
+
+%\clearpage
+\paragraph{Pair-wise Intersection}
+In the $D$, $E$ case we have 
+
+We can say that where the areas defined by the curves intersect but no one curve encloses the 
+other, we can term this `pair-wise intersection'.
+We can express this as a non directed relationship.
+
+$$ D \pin E $$
+
+
+\paragraph{Mutual exclusivity of `pair-wise intersection' and `enclosure'}
+
+Clearly these two properties are mutually exclusive. No
+contour can be both pair-wisely intersected and enclosed with the same contour.
+Also enclosure, is transitive. That is to say if B encloses A, and A encloses C
+then B encloses C, see figure \ref{fig:eulerg_enc}.
+
+\begin{definition}
+\label{def:mutex}
+No contour can be both pair-wisely intersected and enclosed with the same contour.
+\end{definition}
+
+\clearpage
+\begin{figure}[h]
+ \centering
+
+ \subfigure[Euler Diagram]{
+ \includegraphics[width=200pt,keepaspectratio=true]{./eulerg/eulerg_enc.jpg}
+ % eulerg_enc.jpg: 315x269 pixel, 72dpi, 11.11x9.49 cm, bb=0 0 315 269
+ \label{eulerenc}
+ }
+
+ \subfigure[Graph Representation]{
+ \includegraphics[width=100pt,bb=0 0 240 43,keepaspectratio=true]{./eulerg/eulerg_enc_g.jpg}
+ % eulerg_enc_g.jpg: 240x43 pixel, 72dpi, 8.47x1.52 cm, bb=0 0 240 43
+  \label{graphenc}
+ }
+ \caption{Enclosure, a transitive relationship}
+ \label{fig:eulerg_enc}
+\end{figure}
+
+$$ B {\enc} A \wedge A {\enc} C \implies B {\enc} C $$
+
+\begin{definition}
+\label{def:enctrans}
+Enclosure relationships are transitive.
+\end{definition}
+
+
+\pagebreak[1]
+\section{Representing Euler Diagrams \\ as sets of relationships}
+
+The diagram in figure \ref{fig:eulerg1} can be represented by the following relationships.
+
+$$ B {\enc} A $$
+$$ D {\pin} E $$
+
+
+The diagram in figure \ref{fig:eulerg_enc} can be represented by the following relationships.
+
+$$ B {\enc} A $$
+$$ A {\enc} C $$
+
+\section{Representing Euler diagrams as graphs}
+
+As the relationships {\em enclosure} and {\em pair-wise intersection} are mutually exclusive
+and {\em enclosure} is transitive and {\em pair-wise intersection} is not, we can represent
+an {\em enclosure} relationship as a directed vertice and 
+{\pic} as non-directed on the same graph.
+Figures \ref{fig:eulerg1} and \ref{fig:eulerg_enc} show Euler diagrams with corresponding 
+graphs. The next section will introduce the concept of a {\pic}
+and will  present graphs where both enclosure and pair-wise
+intersection are represented on the same graph.
+
+\pagebreak[1]
+\section{The {\pic}}
+In graph theory a node is said to be reachable from another node
+if you can start at the one node, travel via the edges
+and arrive at the other. 
+Contours may be connected via `pair-wise intersection' relationships to form 
+`chains' of contours reachable by pair-wise intersection.
+These are termed {\pic}s.
+Figure \ref{fig:eulerg_pic} shows a {\pic} consisting of contours $M,N,O,P$ and $Q$.
+
+\begin{figure}[h]
+ \centering
+ \includegraphics[width=400pt,keepaspectratio=true]{./eulerg/eulerg_pic.jpg}
+ % eulerg_pic.jpg: 955x286 pixel, 72dpi, 33.69x10.09 cm, bb=0 0 955 286
+ \caption{{\pic} with Enclosure}
+ \label{fig:eulerg_pic}
+\end{figure}
+
+%\textbf{rule:}
+\begin{definition}
+\label{def:encpic}
+If any contour in a {\pic} is enclosed by any contour not belonging to the chain, 
+all the contours within the 
+{\pic} will be enclosed by it. 
+\end{definition}
+
+Note that any contour 
+which bisects another contour in a {\pic}
+becomes part of the pair-wise~intersection~chain.
+% Hmmmm thats true but a better way to say it ????
+%The diagram in figure \ref{fig:eulerg_enc} can be represented by the following relationships.
+
+
+\vbox{
+The diagram in figure \ref{fig:eulerg_pic} can be represented by the following relationships.
+
+$$ M {\pin} N $$
+$$ N {\pin} O $$
+$$ O {\pin} P $$
+$$ O {\pin} Q $$
+$$ Q {\enc} P $$
+$$ A {\enc} M $$
+$$ A {\enc} N $$
+$$ A {\enc} O $$
+$$ A {\enc} P $$
+$$ A {\enc} Q $$
+}
+
+To form the {\pic} we can follow
+reachable pair-wise intersection relationships.
+
+$ M {\pin} N {\pin} O {\pin} P $ are part of the same chain.
+following from $O$, $O {\pin} Q$.
+Thus by the definition of being reachable by pair-wise intersection relationships,$M,N,O,P,Q$
+are in the same {\pic}, even though $Q$ encloses $P$.
+
+We can define this {\pic} as $PIC1$ as a set of contours.
+
+$$ PIC1 = \{ M,N,O,P,Q \} $$
+
+Contour $A$, by virtue of not bisecting any contour in the pair-wise intersection
+chain $PIC1$, does not belong to  $PIC1$. Because it encloses one of the contours, it
+encloses all contours in the chain. 
+Knowing this can save on unnecessary area operations on the concrete diagram.
+
+\begin{figure}[h]
+ \centering
+ \includegraphics[width=200pt,bb=0 0 330 158,keepaspectratio=true]{./eulerg/eulerg_pic_g.jpg}
+ % eulerg_pic_g.jpg: 330x158 pixel, 72dpi, 11.64x5.57 cm, bb=0 0 330 158
+ \caption{Pair-wise Intersection chain PIC1 as a graph}
+ \label{fig:eulerg_pic_g}
+\end{figure}
+%  \subsection{The Pair-wise intersection chain PIC1}
+%  \begin{figure}[h]
+%   \centering
+%   \includegraphics[width=200pt,bb=0 0 955 286,keepaspectratio=true]{./eulerg_pic_g.jpg}
+%   % eulerg_pic.jpg: 955x286 pixel, 72dpi, 33.69x10.09 cm, bb=0 0 955 286
+%   \caption{The pair-wise Intersection PIC1 as a graph}
+%   \label{fig:eulerg_pic1}
+%  \end{figure}
+
+
+Figure \ref{fig:eulerg_pic_g} only shows the {\pic}, but does not show the contour ($A$)
+enclosing $PIC1$. Figure \ref{fig:eulerg_pic_g_a}
+shows contour A enclosing all elements in $PIC1$
+
+\pagebreak[1]
+\subsection{Enclosure and pair-wise \\ intersection in the graph}
+Because enclosure is a directed relationship and {\em pair-wise intersection} is non-directed
+we can represent them both on the same graph, see figure \ref{fig:eulerg_pic_g_a}.
+\begin{figure}[h]
+ \centering
+ \includegraphics[width=200pt,bb=0 0 330 162,keepaspectratio=true]{./eulerg/eulerg_pic_g_a.jpg}
+ % eulerg_pic_g_a.jpg: 330x162 pixel, 72dpi, 11.64x5.72 cm, bb=0 0 330 162
+ \caption{Graph of Euler diagram in figure \ref{fig:eulerg_pic}.}
+ \label{fig:eulerg_pic_g_a}
+\end{figure}
+
+\pagebreak[1]
+\subsection{Reducing clutter in the graph}
+Contour A encloses the pure intersection chain $PIC1$;
+using definition \ref{def:encpic}, we can draw this in a less cluttered way,
+by only drawing one enclosure relationship to the {\pic}
+(see figure \ref{fig:eulerg_pic_g_a_unc}).
+We only need to show contour A enclosing one member of the {\pic} $PIC1$
+in order to show that contour A encloses all contours in $PIC1$.
+
+
+
+\begin{figure}[h]
+ \centering
+ \includegraphics[width=200pt,bb=0 0 330 162]{./eulerg/eulerg_pic_g_a_unc.jpg}
+ % eulerg_pic_g_a_unc.jpg: 330x162 pixel, 72dpi, 11.64x5.72 cm, bb=0 0 330 162
+ \caption{Uncluttered graph of Euler diagram in figure \ref{fig:eulerg_pic}.}
+ \label{fig:eulerg_pic_g_a_unc}
+\end{figure}
+
+
+%\pagebreak[9]
+\clearpage
+\section{Reduction of searches \\ for available zones}
+
+Another property of any {\pic} $P$, is that
+the maximum number of Euler zones within it is 
+
+$$ MaxZones =  2^{|P|}  $$
+
+Because no contours external to the {\pic} 
+bisect any in it, no extra zones can be formed.
+By enclosing a {\pic} with 
+a contour, we change the nature of the zones within
+the {\pic}, but the number of zones contributed by the {\pic}
+stays the same.
+\begin{definition}
+\label{picreduction}
+The number of available zones within a {\pic} $P$ does not change 
+when other contours are added or removed from the diagram
+that are not, or would not become members of the {\pic} $P$.
+\end{definition}
+That is to say, the the number of zones within a {\pic} is not affected by changes in the diagram 
+that do not alter the {\pic}.
+This allows us to analyse {\pic}s separately, thus reducing the $2^N$ overhead of analysing an Euler diagram for available zones.
+\pagebreak[3]
+\subsection{Available Zone Searching}
+
+The available zones in an Euler diagram represent set theoretic combinations
+that can be used in the diagram. 
+%For FMMD analyis, the test~cases
+Searching for an available zone involves finding out if the intersection exists, and then determining whether it is covered up
+by any other contours. 
+A brute force search for available zones using area operations
+is therefore of the order $N.2^N$ (where N is the number of contours in the diagram).
+Using $|P|$ to represent the number of contours within a {\pic} 
+and $K$ to represent the number of {\pic}s in a diagram,
+using the result in definition \ref{picreduction}, we can break the diagram into small segments
+(the {\pic}s) which have an order $K.2^{|P|}$.
+The exponential $2^N$ overhead is thus broken down into several smaller $2^{|P|}$ operations.
+The order of area operations is generally\footnote{In the case where the diagram is not comprised of just one {\pic}, which has no enclosing contours.} 
+reduced  by requiring several  $K.|P|.2^{|P|}$
+instead of $N.2^N$ as $K < N$.
+
+This has effectively reduced the order of the searching algorithm from exponential to polynomial order.
+
+\vspace{40pt}
+

old_thesis/eulerg/eulerg.tex.backup

@@ -0,0 +1,119 @@
+
+
+
+\ifthenelse {\boolean{paper}}
+{
+\abstract{
+This paper discusses representing Euler Diagrams as graphs, or sets of relationships.
+By representing Euler diagrams in this way,
+algorithms to invesigate properties of the diagrams, are possible, without
+having to resort
+to CPU expensive area operations on the concrete diagrams. 
+}
+}
+{ %% Introduction
+\section{Introduction}
+This paper discusses representing Euler Diagrams as graphs, or sets of relationships.
+By representing Euler diagrams in this way,
+algorithms to invesigate properties of the diagrams, are possible, without
+having to resort
+to CPU expensive area operations on the concrete diagrams. 
+}
+
+
+\section{Introduction : Euler Diagram }
+
+Classical Euler diagrams consist of closed curves in the plane which are used to represent sets.
+The spaitial relationship between the curves defines the set theoretic relationships, as defined below.
+\begin{itemize}
+\item Intersection - if the curves defining the area within curves overlap
+\item Sub-set      - if a curve is enclosed by another
+\item disjoint     - if the curves are separate
+\end{itemize}
+
+
+\section{Defining `pure intersection' and `enclosure'}
+\begin{figure}[h]
+ \centering
+ \includegraphics[width=200pt,keepaspectratio=true]{./eulerg1.jpg}
+ % eulerg1.jpg: 513x215 pixel, 72dpi, 18.10x7.58 cm, bb=0 0 513 215
+ \caption{An Euler Diagram showing enclosure and Pure Intersection}
+ \label{fig:eulerg1}
+\end{figure}
+
+The set theory term `intersection' can apply to both the curves overlapping and to the sub-set case.
+For instance in diagram \ref{fig:euler1} the intersection between
+$A$ and $B$ exists.
+
+$$ A \cup B \neq \emptyset $$
+
+as does the intersection $D$ and $E$
+
+$$ D \cup E \neq \emptyset $$
+
+Clearly though these intersections are different, because
+in the $A$, $B$ case 
+$$ A \backslash B = \emptyset \wedge B \backslash A \neq \emptyset $$.
+This is not the case for $D$, $E$ where:
+$$ D \backslash E \neq \emptyset \wedge E \backslash D \neq \emptyset $$
+
+\paragraph{Enclosure}
+To distinguish between these we can term the $A$, $B$ case to be 
+$A$ `enclosed' by $B$. We can express this as a directed relationship.
+
+$$ B {\enc} A $$
+
+
+\paragraph{Pure Intersection}
+In the $D$, $E$ case we have 
+
+We can say that where the areas defined by the curves intersect but no one curve encloses the 
+other, we can term this `pure intersection'.
+We can express this as a non directed relationship.
+
+$$ D \pin E $$
+
+
+\paragraph{Mutual exclusivity of `pure intersection' and `enclosure'}
+
+Clearly these two properties are mutually exclusive. No
+contour can be both purely intersected and enclosed with the same contour.
+Also enclosure, is transitive. That is to say if B encloses A, and A encloses C
+then B encloses C, see figure \ref{fig:eulerg_enc}.
+
+\begin{figure}[h]
+ \centering
+ \includegraphics[width=200pt,keepaspectratio=true]{./eulerg_enc.jpg}
+ % eulerg_enc.jpg: 315x269 pixel, 72dpi, 11.11x9.49 cm, bb=0 0 315 269
+ \caption{Enclosure, a transitive relationship}
+ \label{fig:eulerg_enc}
+\end{figure}
+
+$$ B {\enc} A \wedge A {\enc} C \implies B {\enc} C $$
+
+\section{Representing Euler Diagrams as sets of relationships}
+
+The diagram in figure \ref{fig:eulerg1} can be represented by the foillowing relationships.
+
+$$ B {\enc} A $$
+$$ D {\pin} E $$
+
+
+The diagram in figure \ref{fig:eulerg_enc} can be represented by the following relationships.
+
+$$ B {\enc} A $$
+$$ A {\enc} C $$
+
+
+\section{The Pure Intersection chain}
+
+Contours may be connected via `pure intersection' relationships to form 
+`chains' of contours reachable by pure intersection.
+
+Figure \ref{fig:eulerg_pic} shows a pure intersection chain consisting of contours $M,N,O,P$ and $Q$.
+
+
+\textbf{rule:}
+If any contour in a pure intersection chain is enclosed by any contour, all countours within the 
+pure intersection chain will be enclosed by it.
+

old_thesis/eulerg/paper.tex

@@ -0,0 +1,36 @@
+
+\documentclass[a4paper,10pt]{article}
+\usepackage{graphicx}
+\usepackage{fancyhdr}
+\usepackage{tikz}
+\usepackage{subfigure}
+\usepackage{amsfonts,amsmath,amsthm}
+\usepackage{algorithm}
+\usepackage{algorithmic}
+\usepackage{ifthen}
+\newboolean{paper}
+\setboolean{paper}{true} % boolvar=true or false
+
+\input{../style}
+
+%\newtheorem{definition}{Definition:}
+
+\begin{document}
+\pagestyle{fancy}
+
+%\outerhead{{\small\bf Symptom Extraction Process}}         
+%\innerfoot{{\small\bf R.P. Clark } }   
+                                              % numbers at outer edges
+\pagenumbering{arabic}                        % Arabic page numbers hereafter
+\author{R.P.Clark}
+\title{Euler Diagrams as Graphs}
+\maketitle 
+\input{eulerg_paper}
+
+\bibliographystyle{plain}
+\bibliography{../vmgbibliography,../mybib}
+
+\today
+
+
+\end{document}

old_thesis/fmmd_concept/Makefile

@@ -0,0 +1,19 @@
+
+#
+
+
+paper:	paper.tex fmmd_concept_paper.tex
+	#latex paper.tex
+	#dvipdf paper     pdflatex cannot use eps ffs
+	pdflatex paper.tex
+	cp paper.pdf fmmd_concept_paper.pdf
+	okular fmmd_concept_paper.pdf
+
+
+# Remove the need for referncing graphics in subdirectories
+#
+fmmd_concept_paper.tex: fmmd_concept.tex paper.tex
+	cat fmmd_concept.tex | sed 's/fmmd_concept\///' > fmmd_concept_paper.tex
+
+bib:	
+	bibtex paper

old_thesis/fmmd_concept/paper.tex

@@ -0,0 +1,42 @@
+
+\documentclass[a4paper,10pt]{article}
+\usepackage{graphicx}
+\usepackage{fancyhdr}
+\usepackage{tikz}
+\usetikzlibrary{shapes,snakes}
+\usepackage{amsfonts,amsmath,amsthm}
+\input{../style}
+\usepackage{ifthen}
+\usepackage{lastpage}
+
+\newboolean{paper}
+\setboolean{paper}{true} % boolvar=true or false
+
+
+%\newtheorem{definition}{Definition:}
+
+\begin{document}
+\pagestyle{fancy}
+\fancyhf{}
+%\renewcommand{\chaptermark}[1]{\markboth{ \emph{#1}}{}}
+\fancyhead[LO]{}
+\fancyhead[RE]{\leftmark}
+%\fancyfoot[LE,RO]{\thepage}
+\cfoot{Page \thepage\ of \pageref{LastPage}}
+\rfoot{\today}
+\lhead{Developing a rigorous bottom-up modular static failure mode modelling methodology}
+
+%\outerhead{{\small\bf Developing a rigorous bottom-up modular static failure mode modelling methodology}}
+%\innerfoot{{\small\bf R.P. Clark } }   
+                                              % numbers at outer edges
+\pagenumbering{arabic}                        % Arabic page numbers hereafter
+\author{R.P.Clark}
+\title{Developing a rigorous bottom-up modular static failure mode modelling methodology}
+\maketitle 
+\input{fmmd_concept_paper}
+
+\bibliographystyle{plain}
+\bibliography{../vmgbibliography,../mybib}
+
+\today
+\end{document}