From fed0f020f5169f96a0fb3d82a87aa5cb92d6fbaa Mon Sep 17 00:00:00 2001 From: Robin Date: Mon, 31 May 2010 19:31:43 +0100 Subject: [PATCH] double simultaneous auto check possibility --- logic_diagram/logic_diagram.tex | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/logic_diagram/logic_diagram.tex b/logic_diagram/logic_diagram.tex index 44ef29a..94d69e4 100644 --- a/logic_diagram/logic_diagram.tex +++ b/logic_diagram/logic_diagram.tex @@ -812,6 +812,9 @@ Note that we have here all the single and double failure test cases in one diagr \label{fig:doublesim} \end{figure} +\paragraph{Automated checking of double failure mode conditions} +A PLD editor can be set to ensure that each diagram has a test case for every +double simultaneous failure instance. \section{N Simultaneous Errors} @@ -834,10 +837,6 @@ possibility into the design. \label{fig:allfour} \end{figure} - -TO DO: -Venn N example - %\subsection{Example Sub-system} % %For instance were a `power supply' being analysed there could be several