sw model notes

This commit is contained in:
Robin Clark 2011-02-07 20:49:14 +00:00
parent 34f893238e
commit ea6414f401

View File

@ -290,6 +290,14 @@ have at least the following functional modiules intgrated into it:
\item digital I/O.
\end{itemize}
Need to consider the failure modes of all these components.
For ADC we also need to consider the MUX and how it interfaces with general I/O
pins.
this later makes the example where we test the ADC and the MUX by
forcing logical values onto the I/O pins the ADC reads.
%% Super bbc micro all on one 28 pin chip