JMC pr, additional claim on FMMD
identifying unobservable failure modes.
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@ -505,6 +505,7 @@ We analyse this hardware/software combined {\fg}.
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{
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\tiny
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\begin{table}[h+]
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\center
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\caption{$G_2$: Failure Mode Effects Analysis} % title of Table
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\label{tbl:radc}
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@ -582,6 +583,7 @@ software component $read\_4\_20\_input$, i.e. $G_3 = \{read\_4\_20\_input, RADC\
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{
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\tiny
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\begin{table}[h+]
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\center
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\caption{$G_3$: Read\_4\_20: Failure Mode Effects Analysis} % title of Table
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\label{tbl:r420i}
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@ -801,8 +803,8 @@ In all `bare~metal'\footnote{`Bare~metal' is a term used to indicate a micro-pro
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controlled system that does not use a traditional operating system.}
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software architectures, we need a rudimentary operating system, often referred to as the `monitor'.
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%
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We bear in mind that PID, because the algorithm depends heavily on integral calculus is time sensitive
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and we therefore need to call at precise intervals determined by its proportional, integral and differential (PID) coefficients.
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We bear in mind that PID, because the algorithm depends heavily on integral calculus~\cite{dcods}[Ch.3.3] it is time sensitive
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and we therefore need to execute it at precise intervals determined by its proportional, integral and differential (PID) coefficients.
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%
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Most micro-controllers feature several general purpose timers~\cite{pic18f2523}.
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We can use an internal timer in conjunction with the monitor function
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@ -851,7 +853,7 @@ demand which will be returned to the monitor function).
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The PID demand value will be applied via the PWM.
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We now have a rudimentary closed loop control system incorporating both hardware and software.
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%
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By using the Yourdon methodology we obtain a the programmatic design i.e. we define a call tree structure.
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By using the Yourdon methodology we obtain a programmatic design frame-work i.e. a call tree structure.
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%
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We now have all the components, i.e. hardware elements and software functions
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that will be used in the temperature controller.
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@ -878,14 +880,14 @@ Identified electronic components:
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\subsection{Temperature Controller Hardware Elements FMMD}
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\subsection{Temperature Controller Hardware Elements FMMD.}
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\paragraph{ACDMUX and Read\_ADC}
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We re-use this derived component from section~\ref{readADC}.
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$$ fm(RADC) = \{ VV\_ERR, HIGH, LOW \} .$$
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\paragraph{TIMER}
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\paragraph{TIMER.}
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The internal timer in use is a register which when read
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returns an incremented time value.
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Using two's complement mathematics, by subtracting
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@ -895,20 +897,20 @@ We can say that a timer can fail by
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incrementing its value at an incorrect rate, or can stop incrementing.
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$$ fm(TIMER) = \{ STOPPED, INCORRECT\_INTERVAL \}$$
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\paragraph{HEATER}
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\paragraph{HEATER.}
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A heating element is typically some configuration of resistive wire.
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It therefore has the same failure modes as a resistor and we can state
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$$fm(HEATER) = \{ OPEN, SHORT \}$$
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\paragraph{Pt100 Platinum Temperature Sensor}
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\paragraph{Pt100 Platinum Temperature Sensor.}
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The Pt100 four wire configuration is analysed in section~\ref{sec:Pt100}
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$$ fm(Pt100) = \{ OUT\_OF\_RANGE \} $$
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\paragraph{PWM}
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\paragraph{PWM.}
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%The PWM, in use, is a hardware register written to with an integer value~\cite{pic182523}[Ch.15].
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From a programmatic perspective a PWM output is a register that software writes
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an unsigned magnitude value to~\cite{pic18f2523}[Ch.15].
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From a programmatic perspective a PWM output is a register to which software writes
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an unsigned magnitude value~\cite{pic18f2523}[Ch.15].
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The PWM hardware module
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applies this using a mark space ratio proportional to that value, providing
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a means of varying the amount of power supplied.
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@ -917,7 +919,7 @@ will typically be held in a high or low state.
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We therefore state:
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$$ fm(PWM) = \{ HIGH, LOW \}.$$
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\paragraph{Micro-Controller}
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\paragraph{Micro-Controller.}
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The Micro controller is a complex piece of highly integrated electronics.
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Typically, along with a micro-processor with PROM and RAM, they have many I/O modules including UARTS, PWM, ADCMUX, CAN
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General I/O and interrupt lines to name but a few.
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@ -1130,7 +1132,7 @@ The post-condition is that it outputs correct control values.
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% and controll values..... Jitter might not matter, wrong int times would
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% controlling function provdes context of use.
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Those familiar with the PID algorithm may realise that digital signal processing algorithms are sensitive to calling frequency.
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Were this function to be called at an incorrect rate its output
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Were this function to be called at an incorrect rate, its output
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would be wrong (the differential and integral parameters would effectively have been changed).
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%
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However this problem is a failure mode for the function calling it.
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@ -1358,7 +1360,7 @@ anything going wrong! The common causes for software failing are:
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\item ROM memory failures;
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\item Unintended behaviour of software.
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\end{itemize}
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Because the software is running on a medium, that of the processor or micro-controller
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Because the software is running on a medium, that of the processor or micro-controller,
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our design at the final or highest level (see table~\ref{tbl:pid}), must include all possible failure modes of this medium i.e.
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$$fm (micro-controller) =\{ PROM\_FAULT, RAM\_FAULT, CPU\_FAULT, ALU\_FAULT, CLOCK\_STOPPED \}.$$
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We perform the final FMMD stage by forming a functional group with the {\dcs}
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@ -1445,7 +1447,8 @@ The post condition for the monitor function is that it implements the PID contro
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We can now create a {\dc} for the standalone temperature controller, and give it the name TempController.
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It will have the following failure modes:
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$$fm ( TempController ) = \{ ControlFailureIndicated, ControlFailure, KnownIndicationError, UnknownIndicationError \}.$$
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$$fm ( TempController ) = \{ ControlFailureIndicated, ControlFailure, \\
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KnownIndicationError, UnknownIndicationError \}.$$
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We can now represent this failure mode analysis as an Euler diagram, see figure~\ref{fig:euler_temp_controller}.
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@ -1462,8 +1465,18 @@ We can now represent this failure mode analysis as an Euler diagram, see figure~
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\subsection{Conclusion: Standalone system, PID Temperature Controller}
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The PID temperature control example above, shows that complete hybrid software/electronic systems can be
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modelled using FMMD. The analysis has revealed system level failure modes that are un-handled and some that are unobservable,
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but the FMMD analysis shows which failure modes they are. For the failure modes caused
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modelled using FMMD.
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The analysis has revealed system level failure modes that are un-handled and some that are unobservable,
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but using the FMMD analysis we can trace to the low level modules that are the cause of unobservable
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failure modes.
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This means that by using FMMD, we can identify the sub-systems which require
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re-design to eliminate unobservable failure modes.
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The demands of EN61508~\cite{en61508} for minimum safe failure fraction~\cite{scsh}[p.52] thresholds associated with
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SIL levels, make this a desirable feature of any FMEA based methodology.
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%
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For the failure modes caused
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by electronics we can apply reliability statistics.
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%
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For software errors, we could, if necessary provide extra functions to provide self checking.
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