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After swim in pells

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Robin Clark 2010-06-28 18:44:58 +01:00
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108
component_failure_modes_definition/component_failure_modes_definition.tex~
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@ -1,108 +0,0 @@
\abstract{ This chapter defines what is meant by the terms
components, component fault modess and `unitary~state' component fault modes.
Mathematical constraints and definitions are made using set theory.
}
\section{Introduction}
When building a system from components,
we should be able to find all known failure modes for each component.
For most common electrical and mechanical components, the failure modes
for a given type of part can be obtained from standard literature\cite{mil1991}
\cite{mech}. %The failure modes for a given component $K$ form a set $F$.
An important factor in defining a set of failure modes is that they
should be as clearly defined as possible.
%
It should not be possible for instance for
a component to have two or more failure modes active at once.
Having a set of failure modes whhere $N$ modes could be active simultaneously
would mean having to consider $2^N$ failure mode scenarios.
%
Should a component be analysed and simultaneous failure mode cases exit,
the combinations could be represented by a new failure modes, or
the component should be considered from a fresh perspective,
perhaps considering it as several smaller components
within one package.
\begin{definition}
A set of failure modes where only one fault mode
can be active at a time is termed a `unitary~state' failure mode set.
\end{definition}
We can define a function $FM()$ to
take a given component $K$ and return its set of failure modes $F$.
$$ FM : K \mapsto F $$
We can further define a set $U$ which is a set of sets of failure modes, where
the component failure modes in each of its members are unitary~state.
Thus if the failure modes of $F$ are unitary~state, we can say $F \in U$.
\subsection{Component failure modes : Unitary State example}
A component with simple ``unitary~state'' failure modes is the electrical resistor.
Electrical resistors can fail by going OPEN or SHORTED.
However they cannot fail with both conditions active. The conditions
OPEN and SHORT are mutually exlusive.
Because of this the failure mode set $F=FM(R)$ is `unitary~state'.
%A more complex component, say a micro controller could have several
%faults active. It could for instance have a broken I/O output
%and an unstable ADC input. Here the faults cannot be considered `unitary~state'.
% A set of failure modes, where only one or no failure modes
% are active is termed an `unitary~state' failure mode set. This
% will be donoted as set $A$.
%
To define `unitary~state' using set theory we can define a function
`active'.
The function $active(f)$ deontes that the failure mode $f$ (where $f$ is an element of $F$) is currently active.
Thus for the set $F$ to exist in $U$ the following condition must be true.
\begin{equation}
\label{unitarystate_def}
F \in U | f \in F \wedge active(f) \wedge f1 \in F \wedge f1 \neq f \wedge \neg active(f1)
\end{equation}
As an example the resistor $R$
has two failure modes $R_{open}$ and $R_{shorted}$.
$$ FM(R) = F = \{ R_{open}, R_{shorted} \} $$
Applying equation \ref{`unitarystate'_definition} to a resistor
for both fault modes
$$ active(R_{short}) | R_{short} \in F \wedge R_{open} \in F \wedge R_{open} \neq R_{short} \wedge \neg active(R_{open}) $$
$$ active(R_{open}) | R_{open} \in F \wedge R_{short} \in F \wedge R_{short} \neq R_{open} \wedge \neg active(R_{short}) $$
For the case of the resistor with only two failure modes the results above, being true,
show that the failure modes for a resistor of $ F = \{ R_{open}, R_{shorted} \} $ are `unitary~state'
component failure modes.
Thus
$$ FM(R) = \{ R_{open}, R_{shorted} \} \in U $$
A general case can be stated by taking equation \ref{unitary_state_def} and making it a function thus.
\begin{equation}
\label{`unitarystate'_def}
UnitaryState(F) = \forall f \in F | active(f) \wedge f1 \in F \wedge f1 \neq f \wedge \neg active(f1)
\end{equation}
%Which can be written
%$$ UnitaryState(FM(K)) $$
% should this be a paragraph in Symptom Abstraction ????

79
component_failure_modes_definition/component_failure_modes_definition_paper.tex
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@ -1,79 +0,0 @@
\abstract{ This chapter defines what is meant by the terms
components, component fault modes and `unitary~state' component fault modes.
Mathematical constraints and definitions are made using set theory.
}
\section{Introduction}
When building a system from components,
we should be able to find all known failure modes for each component.
For most common electrical and mechanical components, the failure modes
for a given type of part can be obtained from standard literature\cite{mil1991}
\cite{mech}. %The failure modes for a given component $K$ form a set $F$.
An important factor in defining a set of failure modes is that they
should be as clearly defined as possible.
%
It should not be possible for instance for
a component to have two or more failure modes active at once.
Having a set of failure modes where $N$ modes could be active simultaneously
would mean having to consider $2^N$ failure mode scenarios.
%
Should a component be analysed and simultaneous failure mode cases exit,
the combinations could be represented by a new failure modes, or
the component should be considered from a fresh perspective,
perhaps considering it as several smaller components
within one package.
\begin{definition}
A set of failure modes where only one fault mode
can be active at a time is termed a `unitary~state' failure mode set.
This is termed the $U$ set thoughout this study.
This corresponds to the `mutually exclusive' definition in
probability theory\cite{probandstat}.
\end{definition}
We can define a function $FM()$ to
take a given component $K$ and return its set of failure modes $F$.
$$ FM : K \mapsto F $$
We can further define a set $U$ which is a set of sets of failure modes, where
the component failure modes in each of its members are unitary~state.
Thus if the failure modes of $F$ are unitary~state, we can say $F \in U$.
\subsection{Component failure modes : Unitary State example}
A component with simple ``unitary~state'' failure modes is the electrical resistor.
Electrical resistors can fail by going OPEN or SHORTED.
However they cannot fail with both conditions active. The conditions
OPEN and SHORT are mutually exclusive.
Because of this the failure mode set $F=FM(R)$ is `unitary~state'.
Thus
$$ R_{SHORTED} \cap R_{OPEN} = \emptyset $$
We can make this a general case by taking a set $C$ representing a collection
of component failure modes,
We can now state that
$$ c1 \cap c2 \neq \emptyset | c1 \neq c2 \wedge c1,c2 \in C \wedge C \not\in U $$
That is to say that if it is impossible that any pair of failure modes can be active at the same time
the failure mode set is not unitary~state and does not exist in the family of sets $U$
Note where that are more than two failure~modes, by banning pairs from happening at the same time
we have banned larger combinations as well
%$$ c1 \cap c2 \eq \emptyset | c1 \neq c2 \wedge c1,c2 \in C \wedge C \in U $$
%Thus if the failure~modes are pairwaise mutually exclusive they qualify for inclusion into the
%unitary~state set family.

51
logic_diagram/logic_diagram.tex
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@ -3,13 +3,17 @@
{
\begin{abstract}
%This chapter describes using diagrams to represent propositional logic.
Propositial Logic Diagrams have been designed to provide an intuitive method for visualising and manipulating
Propositial Logic Diagrams (PLD) have been designed to provide an intuitive method for visualising and manipulating
a specific sub-set of logic equations, to express fault modes in Mechanical and Electronic Systems.
PLDs are a variant of constraint diagrams. Contours used to express
sets represent failure modes and the Symptomatically merged groups
are akin to the `spiders' of constraint diagrams\ref{constraint}.
%To aid hierarchical stages of fault analysis, it has been specifically developed for the purpose of
%joining conjunctive conditions with disjuctive conditions
%to group the effects of failure modes.
Diagrams of this type can also be used to model the logical conditions
that control the flow of a computer program. This type of diagram can therefore
PLD Diagrams can also be used to model the structure of software
and the flow of data through a computer program.
This type of diagram can therefore
integrate logical models from mechanical, electronic and software domains.
Nearly all modern safety critical systems involve these three disiplines.
%
@ -29,7 +33,37 @@ The Diagrams described here form the mathematical basis for a new visual and for
for the analysis of safety critical software and hardware systems.
\end{abstract}
}
{}
{
\section{Intrduction}
Propositial Logic Diagrams (PLD) have been designed to provide an intuitive method for visualising and manipulating
a specific sub-set of logic equations, to express fault modes in Mechanical and Electronic Systems.
PLDs are a variant of constraint diagrams. Contours used to express
sets represent failure modes and the Symptomatically merged groups
are akin to the `spiders' of constraint diagrams\ref{constraint}.
%To aid hierarchical stages of fault analysis, it has been specifically developed for the purpose of
%joining conjunctive conditions with disjuctive conditions
%to group the effects of failure modes.
PLD Diagrams can also be used to model the structure of software
and the flow of data through a computer program.
This type of diagram can therefore
integrate logical models from mechanical, electronic and software domains.
Nearly all modern safety critical systems involve these three disiplines.
%
It is intended to be used for analysis of automated safety critical systems.
Many types of safety critical systems now legally
require fault mode effects analysis\cite{FMEA},
but few formal systems exist and wide-spread take-up is
not yet the norm.\cite{takeup}.
%
Because of its visual nature, it is easy to manipulate and model
complicated conditions that can lead to dangerous failures in
automated systems.
% No need to talk about abstraction yet, just define PLD PROPERLY
The Diagrams described here form the mathematical basis for a new visual and formal system
for the analysis of safety critical software and hardware systems.
}
%\title{Propositional Logic Diagrams}
%\begin{keyword}
@ -44,14 +78,19 @@ for the analysis of safety critical software and hardware systems.
% it deserves a whole chapter.
\ifthenelse {\boolean{paper}}
{
\section{Introduction}
}
{
Propositional Logic Diagrams (PLDs) have been devised
}
Propositional Logic Diagrams (PLDs) have been created
to collect and simplfy fault~modes in safety critical systems undergoing
static analysis\cite{FMEA}\cite{SIL}.
%
This type of analysis treats failure modes within a system as logical
states.
states.
PLD provides a visual method for modelling failure~mode analysis
within these systems, and aids the collection of
common failure symptoms.

1
symptom_ex_process/symptom_ex_process.tex
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@ -88,6 +88,7 @@ This chapter focuses on the process of building the blocks, the symptom extracti
%\clearpage
\section{Fault Finding and Failure Mode Analysis}
\subsection{Top Down or natural trouble shooting}
It is interesting here to look at the `natural' trouble shooting process.