typos mainly
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@ -40,8 +40,8 @@ diagrams to assist the reasoning process.
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This chapter describes taking
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This chapter describes taking
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the failure modes of the components, analysing the circuit using FMEA
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the failure modes of the components, analysing the circuit using FMEA
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and producing a failure mode model for the circuit as a whole.
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and producing a failure mode model for the circuit as a whole.
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Thus after the analysis the PT100 temperature sensing circuit, may be veiwed
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Thus after the analysis the PT100 temperature sensing circuit, may be viewed
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from an FMEA persepective as a component itself, with a set of known failure modes.
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from an FMEA perspective as a component itself, with a set of known failure modes.
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}
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}
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\begin{figure}[h]
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\begin{figure}[h]
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@ -57,7 +57,7 @@ from an FMEA persepective as a component itself, with a set of known failure mod
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The PT100 four wire circuit uses two wires to supply small electrical current,
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The PT100 four wire circuit uses two wires to supply small electrical current,
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and returns two sense volages by the other two.
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and returns two sense volages by the other two.
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By measuring volatges
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By measuring voltages
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from sections of this circuit forming potential dividers, we can determine the
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from sections of this circuit forming potential dividers, we can determine the
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resistance of the platinum wire sensor. The resistance
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resistance of the platinum wire sensor. The resistance
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of this is directly related to temperature, and may be determined by
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of this is directly related to temperature, and may be determined by
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@ -79,16 +79,16 @@ through the circuit to obtain accurate temperature readings}
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are shown in figure \ref{fig:pt100vrange}. Note that there is
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are shown in figure \ref{fig:pt100vrange}. Note that there is
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an expected range for each reading, for a given temperature span.
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an expected range for each reading, for a given temperature span.
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Note that the low reading goes down as temperature increases, and the higher reading goes up.
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Note that the low reading goes down as temperature increases, and the higher reading goes up.
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For this reason the low reading will be reffered to as {\em sense-}
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For this reason the low reading will be referred to as {\em sense-}
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and the higher as {\em sense+}.
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and the higher as {\em sense+}.
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\subsection{Accuracy despite variable \\ resistance in cables}
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\subsection{Accuracy despite variable \\ resistance in cables}
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For electronic and accuracy reasons a four wire circuit is preffered
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For electronic and accuracy reasons a four wire circuit is preferred
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because of resistance in the cables. Resistance from the supply
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because of resistance in the cables. Resistance from the supply
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causes a slight voltage
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causes a slight voltage
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drop in the supply to the PT100. As no significant current
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drop in the supply to the PT100. As no significant current
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is carried by the two `sense' lines the resistance back to the ADC
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is carried by the two `sense' lines, the resistance back to the ADC
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causes only a negligible voltage drop, and thus the four wire
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causes only a negligible voltage drop, and thus the four wire
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configuration is more accurate\footnote{The increased accuracy is because the voltage measured, is the voltage across
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configuration is more accurate\footnote{The increased accuracy is because the voltage measured, is the voltage across
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the thermistor and not the voltage across the thermistor and current supply wire resistance.}.
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the thermistor and not the voltage across the thermistor and current supply wire resistance.}.
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@ -100,7 +100,7 @@ whole circuit can be measured on the PCB by reading a third
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sense voltage from one of the load resistors. Knowing the current flowing
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sense voltage from one of the load resistors. Knowing the current flowing
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through the circuit
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through the circuit
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and knowing the voltage drop over the PT100, we can calculate its
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and knowing the voltage drop over the PT100, we can calculate its
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resistance by ohms law $V=I.R$, $R=\frac{V}{I}$.
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resistance by Ohms law $V=I.R$, $R=\frac{V}{I}$.
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Thus a little loss of supply current due to resistance in the cables
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Thus a little loss of supply current due to resistance in the cables
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does not impinge on accuracy.
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does not impinge on accuracy.
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The resistance to temperature conversion is achieved
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The resistance to temperature conversion is achieved
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@ -131,7 +131,7 @@ All components have a set of known `failure modes'.
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In other words we know that a given component can fail in several distinct ways.
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In other words we know that a given component can fail in several distinct ways.
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Studies have been published which list common component types
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Studies have been published which list common component types
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and their sets of failure modes, often with MTTF statistics \cite{mil1991}.
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and their sets of failure modes, often with MTTF statistics \cite{mil1991}.
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Thus for each component, an analysis is made for each of it failure modes,
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Thus for each component, an analysis is made for each of its failure modes,
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with respect to its effect on the
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with respect to its effect on the
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circuit. Each one of these scenarios is termed a `test case'.
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circuit. Each one of these scenarios is termed a `test case'.
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The resultant circuit behaviour for each of these test cases is noted.
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The resultant circuit behaviour for each of these test cases is noted.
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@ -269,7 +269,7 @@ and are thus enclosed by one contour each.
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\end{figure}
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\end{figure}
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%ating input Fault
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%ating input Fault
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This circuit supplies two results, sense+ and sense- voltage readings.
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This circuit supplies two results, the {\em sense+} and {\em sense-} voltage readings.
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To establish the valid voltage ranges for these, and knowing our
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To establish the valid voltage ranges for these, and knowing our
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valid temperature range for this example ({0\oc} .. {300\oc}) we can calculate
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valid temperature range for this example ({0\oc} .. {300\oc}) we can calculate
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valid voltage reading ranges by using the standard voltage divider equation \ref{eqn:vd}
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valid voltage reading ranges by using the standard voltage divider equation \ref{eqn:vd}
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@ -308,7 +308,7 @@ With pt100 at the high end of the temperature range 300\oc.
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$$ highreading = 5V $$
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$$ highreading = 5V $$
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$$ lowreading = 5V.\frac{2k2}{2k2+212.02\Omega} = 4.56V$$
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$$ lowreading = 5V.\frac{2k2}{2k2+212.02\Omega} = 4.56V$$
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Thus with $R_1$ shorted both readingare outside the
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Thus with $R_1$ shorted both readings are outside the
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proscribed range in table \ref{ptbounds}.
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proscribed range in table \ref{ptbounds}.
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\subsubsection{ TC 2 : Voltages $R_1$ OPEN }
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\subsubsection{ TC 2 : Voltages $R_1$ OPEN }
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@ -461,9 +461,9 @@ give the following failures in ${10}^6$ hours:
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While MIL-HDBK-217F gives MTTF for a wide range of common components,
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While MIL-HDBK-217F gives MTTF for a wide range of common components,
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it does not specify how the components will fail (in this case OPEN or SHORT). {Some standards, notably EN298 only consider resistors failing in OPEN mode}.
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it does not specify how the components will fail (in this case OPEN or SHORT). {Some standards, notably EN298 only consider resistors failing in OPEN mode}.
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FMD-97 Gives 27\% OPEN and 3\% SHORTED, for resistors under certain electrical and environmental stresses. This example
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FMD-97 gives 27\% OPEN and 3\% SHORTED, for resistors under certain electrical and environmental stresses. This example
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compromises and uses a 90:10 ratio, for resistor failure.
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compromises and uses a 90:10 ratio, for resistor failure.
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Thus for this example resistors are expevcted to fail OPEN in 90\% of cases and SHORTED
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Thus for this example resistors are expected to fail OPEN in 90\% of cases and SHORTED
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in the other 10\%.
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in the other 10\%.
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A standard fixed film resistor, for use in a benign environment, non military spec at
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A standard fixed film resistor, for use in a benign environment, non military spec at
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temperatures up to 60\oc is given a probability of 13.8 failures per billion ($10^9$)
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temperatures up to 60\oc is given a probability of 13.8 failures per billion ($10^9$)
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@ -566,9 +566,9 @@ conditions.
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In this section we examine the failure mode behaviour for all single
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In this section we examine the failure mode behaviour for all single
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faults and double simultaneous faults.
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faults and double simultaneous faults.
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This corresponds to the cardinality contstrained powerset of
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This corresponds to the cardinality constrained powerset of
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the failure modes in the functional group.
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the failure modes in the functional group.
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All the single faults have already be proved in the last section.
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All the single faults have already been proved in the last section.
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For the next set of test cases, let us again hypothesise
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For the next set of test cases, let us again hypothesise
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the failure modes, and then examine each one in detail with
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the failure modes, and then examine each one in detail with
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potential divider equation proofs.
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potential divider equation proofs.
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@ -678,7 +678,7 @@ in the pt100 circuit. The next task is to investigate
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these test cases in more detail to prove the failure mode hypothese set out in table \ref{tab:ptfmea2}.
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these test cases in more detail to prove the failure mode hypothese set out in table \ref{tab:ptfmea2}.
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\subsection{Proof of Double Faults Hypothese }
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\subsection{Proof of Double Faults Hypothesis }
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\subsubsection{ TC 7 : Voltages $R_1$ OPEN $R_2$ OPEN }
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\subsubsection{ TC 7 : Voltages $R_1$ OPEN $R_2$ OPEN }
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\label{pt100:bothfloating}
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\label{pt100:bothfloating}
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