typos mainly

pt100/pt100.tex

@@ -40,8 +40,8 @@ diagrams to assist the reasoning process.
 This chapter describes taking
 the failure modes of the components, analysing the circuit using FMEA
 and producing a failure mode model for the circuit as a whole.
-Thus after the analysis the PT100 temperature sensing circuit, may be veiwed 
-from an FMEA persepective as a component itself, with a set of known failure modes.
+Thus after the analysis the PT100 temperature sensing circuit, may be viewed 
+from an FMEA perspective as a component itself, with a set of known failure modes.
 }
 
 \begin{figure}[h]
@@ -57,7 +57,7 @@ from an FMEA persepective as a component itself, with a set of known failure mod
 
 The PT100 four wire circuit uses two wires to supply small electrical current,
 and returns two sense volages by the other two.
-By measuring volatges
+By measuring voltages
 from sections of this circuit forming potential dividers, we can determine the 
 resistance of the platinum wire sensor. The resistance
 of this is directly related to temperature, and may be determined by
@@ -79,16 +79,16 @@ through the circuit to obtain accurate temperature readings}
 are shown in figure \ref{fig:pt100vrange}. Note that there is
 an expected range for each reading, for a given temperature span.
 Note that the low reading goes down as temperature increases, and the higher reading goes up.
-For this reason the low reading will be reffered to as {\em sense-}
+For this reason the low reading will be referred to as {\em sense-}
 and the higher as {\em sense+}.
 
 \subsection{Accuracy despite variable \\ resistance in cables}
 
-For electronic and accuracy reasons a four wire circuit is preffered
+For electronic and accuracy reasons a four wire circuit is preferred
 because of resistance in the cables. Resistance from the supply
  causes a slight voltage 
 drop in the supply to the PT100. As no significant current
-is carried by the two `sense' lines the resistance back to the ADC
+is carried by the two `sense' lines, the resistance back to the ADC
 causes only a negligible voltage drop, and thus the four wire 
 configuration is more accurate\footnote{The increased accuracy is because the voltage measured, is the voltage across
 the thermistor and not the voltage across the thermistor and current supply wire resistance.}.
@@ -100,7 +100,7 @@ whole circuit can be measured on the PCB by reading a third
 sense voltage from one of the load resistors. Knowing the current flowing
 through the circuit   
 and knowing the voltage drop over the PT100, we can calculate its 
-resistance  by ohms law $V=I.R$, $R=\frac{V}{I}$. 
+resistance  by Ohms law $V=I.R$, $R=\frac{V}{I}$. 
 Thus a little loss of supply current due to resistance in the cables
 does not impinge on accuracy.
 The resistance to temperature conversion is achieved 
@@ -131,7 +131,7 @@ All components have a set of known `failure modes'.
 In other words we know that a given component can fail in several distinct ways.
 Studies have been published which list common component types 
 and their sets of failure modes, often with MTTF statistics \cite{mil1991}.
-Thus for each component, an analysis is made for each of it failure modes,
+Thus for each component, an analysis is made for each of its failure modes,
 with respect to its effect on the 
 circuit. Each one of these scenarios is termed a `test case'.
 The resultant circuit behaviour for each of these test cases is noted. 
@@ -269,7 +269,7 @@ and are thus enclosed by one contour each.
 \end{figure}
 
 %ating input Fault  
-This circuit supplies two results, sense+ and sense- voltage readings.
+This circuit supplies two results, the {\em sense+} and {\em sense-} voltage readings.
 To establish the valid voltage ranges for these, and knowing our
 valid temperature range for this example ({0\oc} .. {300\oc}) we can calculate
 valid voltage reading ranges by using the standard voltage divider equation \ref{eqn:vd}
@@ -308,7 +308,7 @@ With pt100 at the high end of the temperature range 300\oc.
 $$ highreading = 5V $$
 $$ lowreading = 5V.\frac{2k2}{2k2+212.02\Omega} = 4.56V$$
 
-Thus with $R_1$ shorted both readingare outside the 
+Thus with $R_1$ shorted both readings are outside the 
 proscribed range in table \ref{ptbounds}.
 
 \subsubsection{ TC 2 : Voltages $R_1$ OPEN } 
@@ -461,9 +461,9 @@ give the following failures in ${10}^6$ hours:
 
 While MIL-HDBK-217F gives MTTF for a wide range of common components,
 it does not specify how the components will fail (in this case OPEN or SHORT). {Some standards, notably EN298 only consider resistors failing in OPEN mode}.
-FMD-97 Gives 27\% OPEN and 3\% SHORTED, for resistors under certain electrical and environmental stresses. This example 
+FMD-97 gives 27\% OPEN and 3\% SHORTED, for resistors under certain electrical and environmental stresses. This example 
 compromises and uses a 90:10 ratio, for resistor failure. 
-Thus for this example resistors are expevcted to fail OPEN in 90\% of cases and SHORTED 
+Thus for this example resistors are expected to fail OPEN in 90\% of cases and SHORTED 
 in the other 10\%.
 A standard fixed film resistor, for use in a benign environment, non military spec at
 temperatures up to 60\oc is given a probability of 13.8 failures per billion ($10^9$)
@@ -566,9 +566,9 @@ conditions.
 
 In this section we examine the failure mode behaviour for all single 
 faults and double simultaneous faults.
-This corresponds to the cardinality contstrained powerset of
+This corresponds to the cardinality constrained powerset of
 the failure modes in the functional group.
-All the single faults have already be proved in the last section.
+All the single faults have already been proved in the last section.
 For the next set of test cases, let us again hypothesise
 the failure modes, and then examine each one in detail with
 potential divider equation proofs.
@@ -678,7 +678,7 @@ in the pt100 circuit. The next task is to investigate
 these test cases in more detail to prove the failure mode hypothese set out in table \ref{tab:ptfmea2}.
 
 
-\subsection{Proof of Double Faults Hypothese }
+\subsection{Proof of Double Faults Hypothesis }
 
 \subsubsection{ TC 7 : Voltages $R_1$ OPEN $R_2$ OPEN } 
 \label{pt100:bothfloating}