evening edit (he or she is eating!)
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@ -5,7 +5,18 @@ paper
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describes how the FMMD methodology can be used to refine
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describes how the FMMD methodology can be used to refine
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safety critical designs and identify undetectable and dormant faults.
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safety critical designs and identify undetectable and dormant faults.
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%
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%
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Once undetecable faults or dormant faults are discovered
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Its uses an industry standard mill-volt amplifier
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circuit, intended for reading thermocouples.
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It has an inbuilt safety resistor which allows it
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to detect the thermocouple becoming disconnected/going OPEN.
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%
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This circuit is analysed from an FMMD perspective and
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and two undetectable failure modes are identified.
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A `safety check' circuit is then proposed and analysed.
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This has no undetectable failure modes, but does have one
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`dormant' failure mode.
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%
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This paper shows that once undetectable faults or dormant faults are discovered
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the design can be altered (or have a safety component added), and the FMMD analysis process re-applied.
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the design can be altered (or have a safety component added), and the FMMD analysis process re-applied.
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This can be an iterative process applied until the
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This can be an iterative process applied until the
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design has an acceptable level safety. % of dormant or undetectable failure modes.
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design has an acceptable level safety. % of dormant or undetectable failure modes.
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@ -21,14 +32,26 @@ This chapter
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describes how the FMMD methodology can be used to examine
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describes how the FMMD methodology can be used to examine
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safety critical designs and identify undetectable and dormant faults.
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safety critical designs and identify undetectable and dormant faults.
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%
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%
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Once undetecable faults or dormant faults are discovered
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Its uses an industry standard mill-volt amplifier
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circuit, intended for reading thermocouples.
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It has an inbuilt safety resistor which allows it
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to detect the thermocouple becoming disconnected/going OPEN.
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%
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This circuit is analysed from an FMMD perspective and
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and two undetectable failure modes are identified.
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A `safety check' circuit is then proposed and analysed.
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This has no undetectable failure modes, but does have one
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`dormant' failure mode.
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%
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This paper shows that once undetectable faults or dormant faults are discovered
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the design can be altered (or have a safety component added), and the FMMD analysis process re-applied.
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the design can be altered (or have a safety component added), and the FMMD analysis process re-applied.
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This can be an iterative process which can be applied until the
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This can be an iterative process applied until the
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design has an acceptable level of safety. % dormant or undetectable failure modes.
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design has an acceptable level safety. % of dormant or undetectable failure modes.
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%
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%
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Used in this way, its is a design aide, giving the user
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Used in this way, its is a design aide, giving the user
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the possibility to refine/correct a {\dc} from the perspective
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the possibility to refine/correct a {\dc} from the perspective
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of its failure mode behaviour.
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of its failure mode behaviour.
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}
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}
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@ -44,9 +67,18 @@ the failure mode behaviour is then viewed from the
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{\fg} perspective (i.e. as a symptoms of the {\fg}) and
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{\fg} perspective (i.e. as a symptoms of the {\fg}) and
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common symptoms are then collected. The final stage
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common symptoms are then collected. The final stage
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is to create a {\dc} which has the symptoms of the {\fg}
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is to create a {\dc} which has the symptoms of the {\fg}
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it was sourced from, as its failure modes.
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it was sourced from, as its failure modes.
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%
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%From the failure mode behaviour of the {\fg} common symptoms are collected.
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These common symptoms are % in effect
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the failure mode behaviour of
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the {\fg} viewed as an % single
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entity, or a `black box' component.
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%
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From the analysis of the {\fg} we can create a {\dc}, where the failure modes
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are the symptoms of the {\fg} we derived it from.
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}
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}
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{
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\paragraph{Overview of FMMD Methodology}
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\paragraph{Overview of FMMD Methodology}
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To re-cap from chapter \ref{symptomex},
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To re-cap from chapter \ref{symptomex},
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the principle of FMMD analysis is a five stage process,
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the principle of FMMD analysis is a five stage process,
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@ -57,9 +89,6 @@ the failure mode behaviour is then viewed from the
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common symptoms are then collected. The final stage
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common symptoms are then collected. The final stage
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is to create a {\dc} which has the symptoms of the {\fg}
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is to create a {\dc} which has the symptoms of the {\fg}
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it was sourced from, as its failure modes.
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it was sourced from, as its failure modes.
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{
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%
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%
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%From the failure mode behaviour of the {\fg} common symptoms are collected.
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%From the failure mode behaviour of the {\fg} common symptoms are collected.
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These common symptoms are % in effect
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These common symptoms are % in effect
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@ -69,37 +98,51 @@ entity, or a `black box' component.
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%
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%
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From the analysis of the {\fg} we can create a {\dc}, where the failure modes
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From the analysis of the {\fg} we can create a {\dc}, where the failure modes
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are the symptoms of the {\fg} we derived it from.
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are the symptoms of the {\fg} we derived it from.
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}
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%
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%
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\paragraph{detectable and undetectable failure modes}
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\paragraph{Undetectable failure modes.}
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The symptoms will be detectable (like a value out of range)
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The symptoms will be detectable (like a value out of range)
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or undetectable (like a logic state or value being incorrect).
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or undetectable (like a logic state or value being incorrect).
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The `undetectable' failure modes undertsandably, are the most worrying for the safety critical designer.
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The `undetectable' failure modes understandably, are the most worrying for the safety critical designer.
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EN61058, the statistically based European Norm, using ratios
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EN61058~\cite{en61508}, the statistically based failure mode European Norm, using ratios
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of detected and undetected system failure modes to
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of detected and undetected system failure modes to
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classify the sytems safety levels and describes sub-clasifications
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classify the systems safety levels and describes sub-clasifications
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for detected and undetected failure modes~\cite{en61508}.
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for detected and undetected failure modes.
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%\gloss{DU}
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%\gloss{DD}
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%It is these that are, generally the ones that stand out as single
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%It is these that are, generally the ones that stand out as single
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%failure modes.
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%failure modes.
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For instance, out of range values, are easy to detect by
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For instance, out of range values, are easy to detect by
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systems using the {\dc} supplying them.
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systems using the {\dc} supplying them.
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Undetectable faults are ones that forward incorrect information
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Undetectable faults are ones that supply incorrect information or states
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where we have no way of validating or testing it.
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where we have no way of knowing whether they are correct or not.
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% we know we can cope with; they
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% we know we can cope with; they
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%are an obvious error condition that will be detected by any modules
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%are an obvious error condition that will be detected by any modules
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%using the {\dc}.
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%using the {\dc}.
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%
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%
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An undetecable failure mode can introduce serious
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Undetectable failure modes can introduce serious
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errors into a SYSTEM.
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errors into a SYSTEM.
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\paragraph{dormant faults} A dormant fault is one
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\paragraph{Dormant faults.}
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which can manifest its-self in conjuction with
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A dormant fault is one
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which can manifest its-self in conjunction with
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another failure mode becoming active, or an environmental
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another failure mode becoming active, or an environmental
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condition changing (for instance temperature). Some
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condition changing (for instance temperature).
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Some
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component failure modes may lead to dormant failure modes.
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component failure modes may lead to dormant failure modes.
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By examining test cases from a functional group against all
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For instance a transistor failing OPEN when it is meant
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to be in an OFF state would be a dormant fault.
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Even though the fault is active, the transistor
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is, for the time being, behaving correctly.
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%
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If we examine the circuit from both operational states,
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i.e. the transistor when is is both meant to be ON and OFF
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we can determine all the consequences of that particular failure.
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%
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More generally, by examining test cases from a functional group against all
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operational states and germane environmental conditions
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operational states and germane environmental conditions
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we can determine all the failure modes of the {\fg}.
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we can determine all the failure modes of the {\fg}.
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@ -143,7 +186,7 @@ We then analsye the {\fg} and the resultant {\dc} failure modes/symptoms are dis
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This circuit amplifies a milli-volt input by a gain of $\approx$ 184 ($\frac{150E3}{820}+1$)
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This circuit amplifies a milli-volt input by a gain of $\approx$ 184 ($\frac{150E3}{820}+1$)
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\footnote{The resistors used to program the gain of the op-amp would typically be of a $ \le 1\%$ guaranteed
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\footnote{The resistors used to program the gain of the op-amp would typically be of a $ \le 1\%$ guaranteed
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tolerance. In practise, the small variations would be corrected with software constants prorgammed during production
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tolerance. In practise, the small variations would be corrected with software constants programmed during production
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test/calibration.}.
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test/calibration.}.
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An offset is applied to the input by R18 and R22 forming a potential divider
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An offset is applied to the input by R18 and R22 forming a potential divider
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of $\frac{820}{2.2E6+820}$. With 5V applied as Vcc this gives an input offset of $1.86\,mV$.
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of $\frac{820}{2.2E6+820}$. With 5V applied as Vcc this gives an input offset of $1.86\,mV$.
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@ -153,7 +196,7 @@ So the amplified offset is $\approx 342 \, mV$.
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We can determine the output of the amplifier
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We can determine the output of the amplifier
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by subtracting this amount from the reading. We can also define an acceptable
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by subtracting this amount from the reading. We can also define an acceptable
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range for the readings. This would depend on the characteristics of milli-volt source, and also on the
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range for the readings. This would depend on the characteristics of milli-volt source, and also on the
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thresholds of the volatges considered out of range. For the sake of example let us
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thresholds of the voltages considered out of range. For the sake of example let us
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consider this to be a type K thermocouple amplifier, with a range of temperatures
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consider this to be a type K thermocouple amplifier, with a range of temperatures
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expected to be within {{0}\oc} and {{300}\oc}.
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expected to be within {{0}\oc} and {{300}\oc}.
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@ -162,8 +205,8 @@ Choosing the common Nickel-Chromium v. Nickel Aluminium `K' type thermocouple,
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{{0}\oc} provides an EMF of 0mV, and {{300}\oc} 12.207.
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{{0}\oc} provides an EMF of 0mV, and {{300}\oc} 12.207.
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Multiplying these by 184 and adding the 1.86mV offset gives
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Multiplying these by 184 and adding the 1.86mV offset gives
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342.24mV and 2563.12mV. This is now in a suitable range to be read by
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342.24mV and 2563.12mV. This is now in a suitable range to be read by
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an analogue didtital converter, which will have a voltage span
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an analogue digital converter, which will have a voltage span
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typically between 3.3V and 5V on modern microcontrollers/ADC (Analogue Digital Converter) chips.
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typically between 3.3V and 5V on modern micro-controllers/ADC (Analogue Digital Converter) chips.
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Note that this also leaves a margin or error on both sides of the range.
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Note that this also leaves a margin or error on both sides of the range.
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If the thermocouple were to become colder than {{0}\oc} it would supply
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If the thermocouple were to become colder than {{0}\oc} it would supply
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a negative voltage, which would subtract from the offset.
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a negative voltage, which would subtract from the offset.
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@ -242,7 +285,7 @@ this may be unacceptable.
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We will need to add some type of detection mechanism to the circuit to
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We will need to add some type of detection mechanism to the circuit to
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test $R_{off}$ periodically.
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test $R_{off}$ periodically.
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For instance were we to check $R_off$ every $\tau = 20mS$ work out detection
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For instance were we to check $R_off$ every $\tau = 20mS$ work out detection
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allowance according to EN61508.
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allowance according to EN61508~\cite{en61508}.
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\section{Proposed Checking Method}
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\section{Proposed Checking Method}
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@ -320,13 +363,13 @@ and the reading is assumed to be valid.
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\hline
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\hline
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\hline
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\hline
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%% OK TR1 OFF , and so 36 in series. R36 has shorted so
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%% OK TR1 OFF , and so 36 in series. R36 has shorted so
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$\overline{TEST\_LINE}$ ON & TC:1 $R36$ SHORT & No added resistance & NO TEST EFFECT & XX 1.38 \\ \hline
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$\overline{TEST\_LINE}$ ON & TC:1 $R36$ SHORT & No added resistance & NO TEST EFFECT & 1.38 \\ \hline
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%%
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%%
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$\overline{TEST\_LINE}$ OFF & TC:1 $R36$ SHORT & dormant failure & NO SYMPTOM & XX 1.38 \\ \hline
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$\overline{TEST\_LINE}$ OFF & TC:1 $R36$ SHORT & dormant failure & NO SYMPTOM & 1.38 \\ \hline
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%% here TR1 should be OFF, as R36 is open we now have an open circuit
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%% here TR1 should be OFF, as R36 is open we now have an open circuit
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$\overline{TEST\_LINE}$ ON & TC:2 $R36$ OPEN & open circuit & OPEN CIRCUIT & XX 12.42\\ \hline
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$\overline{TEST\_LINE}$ ON & TC:2 $R36$ OPEN & open circuit & OPEN CIRCUIT & 12.42\\ \hline
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%% here TR1 should be ON and R36 by-passed, the fact it has gone OPEN means no symptom here, a dormant failure.
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%% here TR1 should be ON and R36 by-passed, the fact it has gone OPEN means no symptom here, a dormant failure.
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$\overline{TEST\_LINE}$ OFF & TC:2 $R36$ OPEN & dormant failure & NO SYMPTOM & XX 12.42\\ \hline
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$\overline{TEST\_LINE}$ OFF & TC:2 $R36$ OPEN & dormant failure & NO SYMPTOM & 12.42\\ \hline
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\hline
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\hline
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%
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%
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%% TR1 OFF so R36 should be in series. Because TR1 is ON because it is faulty, R36 is not in series
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%% TR1 OFF so R36 should be in series. Because TR1 is ON because it is faulty, R36 is not in series
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@ -336,10 +379,10 @@ $\overline{TEST\_LINE}$ LINE ON & TC:3 $TR1$ ALWAYS ON & No added resista
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$\overline{TEST\_LINE}$ OFF & TC:3 $TR1$ ALWAYS ON & dormant failure & NO SYMPTOM & XX 1.38 \\ \hline
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$\overline{TEST\_LINE}$ OFF & TC:3 $TR1$ ALWAYS ON & dormant failure & NO SYMPTOM & XX 1.38 \\ \hline
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%%
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%%
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%% TR1 should be off as overline{TEST\_LINE}$ is ON. As TR1 is faulty it is always off and we have a dormant failure.
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%% TR1 should be off as overline{TEST\_LINE}$ is ON. As TR1 is faulty it is always off and we have a dormant failure.
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$\overline{TEST\_LINE}$ LINE ON & TC:4 $TR1$ ALWAYS OFF & dormant failure & NO SYMPTOM & XX 1.38 \\ \hline
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$\overline{TEST\_LINE}$ LINE ON & TC:4 $TR1$ ALWAYS OFF & dormant failure & NO SYMPTOM & 1.38 \\ \hline
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%%
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%%
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%% TR1 should be ON, but is off due to TR1 failure. The resistance R36 will always be in series therefore
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%% TR1 should be ON, but is off due to TR1 failure. The resistance R36 will always be in series therefore
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$\overline{TEST\_LINE}$ OFF & TC:4 $TR1$ ALWAYS OFF & resistance always added & NO TEST EFFECT & XX 1.38 \\ \hline
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$\overline{TEST\_LINE}$ OFF & TC:4 $TR1$ ALWAYS OFF & resistance always added & NO TEST EFFECT & 1.38 \\ \hline
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\hline
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\hline
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\end{tabular}
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\end{tabular}
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\label{tab:testaddition}
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\label{tab:testaddition}
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@ -543,7 +586,7 @@ The meanings of and values assigned to its co-efficients are described in table
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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Taking these parameters and applying equation \ref{microcircuitfit},
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Taking these parameters and applying equation \ref{microcircuitfit},
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$$ 0.04 \times1.4 \times0.0026 \times2.0 \times2.0 \times1.0 = .0005824 $$
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$$ 0.04 \times 1.4 \times 0.0026 \times 2.0 \times 2.0 \times 1.0 = .0005824 $$
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we get a value of $0.0005824 \times {10}^6$ failures per hour.
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we get a value of $0.0005824 \times {10}^6$ failures per hour.
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This is a worst case FIT\footnote{where FIT (Failure in Time) is defined as
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This is a worst case FIT\footnote{where FIT (Failure in Time) is defined as
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failures per Billion (${10}^9$) hours of operation} of 1.
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failures per Billion (${10}^9$) hours of operation} of 1.
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@ -551,7 +594,8 @@ failures per Billion (${10}^9$) hours of operation} of 1.
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\subsection{Switching Transistor}
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\subsection{Switching Transistor}
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The switching transistor will be operating at a low frequency
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The switching transistor will be operating at a low frequency
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and well within 50\% of its maximum voltage.
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and well within 50\% of its maximum voltage. We can also assume a benign
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temperature environment of $ < 60^{o}C$.
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MIL-HDBK-217F\cite{mil1992}[6-25] gives an exmaple
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MIL-HDBK-217F\cite{mil1992}[6-25] gives an exmaple
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transistor in these environmental conditions, and assigns an FIT value of 11.
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transistor in these environmental conditions, and assigns an FIT value of 11.
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@ -572,7 +616,7 @@ but statistically less reliable.
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\paragraph{Practical side effect of checking for thermocouple disconnection}
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\paragraph{Practical side effect of checking for thermocouple disconnection}
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Because the potential divider provides an offset as a side effect of detecting a disconnection
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Because the potential divider provides an offset as a side effect of detecting a disconnection
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resistance in the thermocopule extension or compensation cable will have an effect.
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resistance in the thermocouple extension or compensation cable will have an effect.
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For a `k' type thermocouple this would be of the order of $0.5 { }^{o}C$ for $10\Omega$ of
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For a `k' type thermocouple this would be of the order of $0.5 { }^{o}C$ for $10\Omega$ of
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cable loop impedance. Therefore, accuracy constraints and cable impedance should be considered
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cable loop impedance. Therefore, accuracy constraints and cable impedance should be considered
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to determine specified maximum compensation/extension lengths.
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to determine specified maximum compensation/extension lengths.
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@ -636,7 +636,7 @@ A technique of modularising, or breaking down the problem is clearly necessary.
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One question that anyone developing a safety critical analysis design tool
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One question that anyone developing a safety critical analysis design tool
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could do well to answer, is how the methodology would cope with known previous disasters.
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could do well to answer, is how the methodology would cope with known previous disasters.
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The Challenger disaster is a good example, and was well documented and investigated.
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The Challenger disaster is a good example, and was well documented and investigated~\cite{challenger}.
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The problem lay in a seal that had an operating temperature range.
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The problem lay in a seal that had an operating temperature range.
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On the day of the launch the temperature of this seal was out of range.
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On the day of the launch the temperature of this seal was out of range.
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@ -741,7 +741,7 @@ Contour $C$ is \textbf{enclosed} by contour $A$. This says
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that for failure~mode $C$ to occur failure mode $A$
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that for failure~mode $C$ to occur failure mode $A$
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must have occurred.
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must have occurred.
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A famous example of this is the space shuttle `O' ring failure that
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A famous example of this is the space shuttle `O' ring failure that
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caused the 1986 Challenger disaster\cite{wdycwopt}.
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caused the 1986 Challenger disaster~\cite{challenger}~\cite{wdycwopt}.
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For the failure mode to occur, the ambient temperature had to
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For the failure mode to occur, the ambient temperature had to
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be below a critical value.
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be below a critical value.
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If we take the failure mode of the `O' ring to be $C$
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If we take the failure mode of the `O' ring to be $C$
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@ -305,6 +305,13 @@
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year = "1994"
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year = "1994"
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}
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}
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@MISC{challenger,
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author = "U.S. Presidential Commission",
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title = "Report of the SpaceShuttle Challanger Accident",
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howpublished = "Available from http://science.ksc.nasa.gov/shuttle/missions/51-l/docs/rogers-commission/table-of-contents.html",
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year = "1986"
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}
|
||||||
|
|
||||||
@MISC{en61508,
|
@MISC{en61508,
|
||||||
author = "E N Standard",
|
author = "E N Standard",
|
||||||
title = "EN61508:2002 Functional safety of electrical/electronic/programmable electronic safety related systems",
|
title = "EN61508:2002 Functional safety of electrical/electronic/programmable electronic safety related systems",
|
||||||
@ -425,7 +432,7 @@ OPTissn = {},
|
|||||||
|
|
||||||
|
|
||||||
@TechReport{eurothermtables,
|
@TechReport{eurothermtables,
|
||||||
author = {Alan Brown},
|
author = {Eurotherm Ltd.},
|
||||||
title = {Thermocouple Emf TABLES and PLATINUM 100 RESISTANCE THERMOMETER TABLES},
|
title = {Thermocouple Emf TABLES and PLATINUM 100 RESISTANCE THERMOMETER TABLES},
|
||||||
institution = {Eurotherm, UK},
|
institution = {Eurotherm, UK},
|
||||||
year = {1973},
|
year = {1973},
|
||||||
|
Loading…
Reference in New Issue
Block a user