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Diagrams 3 of them to Euler in CH5

Check Sigma delta analysis
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Robin Clark 2012-09-30 20:43:49 +01:00
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submission_thesis/CH5_Examples/copy.tex
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@ -376,7 +376,10 @@ that we got from FMD-91, listed in equation~\ref{eqn:opampfms}.
\begin{table}[h+] \begin{table}[h+]
\caption{LM358: EN298 Open and shorted pin failure symptom determination technique} \caption{LM358: EN298 Open and shorted pin failure symptom determination technique}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{Amplifier Effect} & & \textbf{Symptom(s)} \\ %\textbf{Failure Scenario} & & \textbf{Amplifier Effect} & & \textbf{Symptom(s)} \\
\textbf{Failure} & & \textbf{Amplifier Effect} & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{ } & & \textbf{Failure Mode} \\
\hline \hline
& & & & \\ \hline & & & & \\ \hline
@ -663,7 +666,10 @@ We can now form a {\fg} from the OP-AMP and the $INVPD$
\begin{table}[h+] \begin{table}[h+]
\caption{Inverting Amplifier: Single failure analysis} \caption{Inverting Amplifier: Single failure analysis}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{Inverted Amp Effect} & & \textbf{Symptom} \\ \hline %\textbf{Failure Scenario} & & \textbf{Inverted Amp Effect} & & \textbf{Symptom} \\ \hline
\textbf{Failure} & & \textbf{Inverted Amp. Effect} & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{ } & & \textbf{Failure Mode} \\
\hline \hline
FS1: INVPD LOW & & NEGATIVE on -input & & $ HIGH $ \\ FS1: INVPD LOW & & NEGATIVE on -input & & $ HIGH $ \\
FS2: INVPD HIGH & & Positive on -input & & $ LOW $ \\ FS2: INVPD HIGH & & Positive on -input & & $ LOW $ \\
@ -805,7 +811,10 @@ derived component.
\begin{table}[h+] \begin{table}[h+]
\caption{Inverting Amplifier: Single failure analysis: 3 components} \caption{Inverting Amplifier: Single failure analysis: 3 components}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{Inverted Amp Effect} & & \textbf{Symptom} \\ \hline %\textbf{Failure Scenario} & & \textbf{Inverted Amp Effect} & & \textbf{Symptom} \\ \hline
\textbf{Failure} & & \textbf{Inverting Amp. Effect} & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{ } & & \textbf{Failure Mode} \\
\hline \hline
FS1: R1 SHORT & & NEGATIVE out of range & & $ HIGH $ \\ FS1: R1 SHORT & & NEGATIVE out of range & & $ HIGH $ \\
% FS1: R1 SHORT -ve in & & POSITIVE out of range & & $ OUT OF RANGE $ \\ \hline % FS1: R1 SHORT -ve in & & POSITIVE out of range & & $ OUT OF RANGE $ \\ \hline
@ -955,17 +964,20 @@ a functional group we can analyse its failure mode behaviour.
\centering % used for centering table \centering % used for centering table
\begin{tabular}{||l|c|c|l|l||} \begin{tabular}{||l|c|c|l|l||}
\hline \hline \hline \hline
\textbf{Test} & \textbf{Amplifier} & \textbf{ } & \textbf{General} \\ %\textbf{Test} & \textbf{Amplifier} & \textbf{ } & \textbf{General} \\
\textbf{Case} & \textbf{Effect} & \textbf{ } & \textbf{Symtom Description} \\ %\textbf{Case} & \textbf{Effect} & \textbf{ } & \textbf{Symtom Description} \\
\textbf{Failure} & & \textbf{Amplifier Effect} & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{ } & & \textbf{Failure Mode} \\
% R & wire & res + & res - & description % R & wire & res + & res - & description
\hline \hline
\hline \hline
TC1: $OPAMP$ LatchUP & Output High & & AMPHigh \\ TC1: $OPAMP$ LatchUP & & Output High & & AMPHigh \\
TC2: $OPAMP$ LatchDown & Output Low : Low gain& & AMPLow \\ \hline TC2: $OPAMP$ LatchDown & & Output Low : Low gain& & AMPLow \\ \hline
TC3: $OPAMP$ No Operation & Output Low & & AMPLow \\ TC3: $OPAMP$ No Operation & & Output Low & & AMPLow \\
TC4: $OPAMP$ Low Slew & Low pass filtering & & LowPass \\ \hline TC4: $OPAMP$ Low Slew & & Low pass filtering & & LowPass \\ \hline
TC5: $PD$ LowPD & Output High & & AMPHigh \\ \hline TC5: $PD$ LowPD & & Output High & & AMPHigh \\ \hline
TC6: $PD$ HighPD & Output Low : Low Gain& & AMPLow \\ \hline TC6: $PD$ HighPD & & Output Low : Low Gain& & AMPLow \\ \hline
%TC7: $R_2$ OPEN & LOW & & LowPD \\ \hline %TC7: $R_2$ OPEN & LOW & & LowPD \\ \hline
\hline \hline
\end{tabular} \end{tabular}
@ -1065,24 +1077,27 @@ Here it is more intuitive to model the resistors not as a potential divider, but
\begin{table}[ht] \begin{table}[ht]
\caption{Second Amplifier $SEC\_AMP$: Failure Mode Effects Analysis: Single Faults} % title of Table \caption{Second Amplifier $SEC\_AMP$: Failure Mode Effects Analysis: Single Faults} % title of Table
\centering % used for centering table \centering % used for centering table
\begin{tabular}{||l|c|c|l|l||} \begin{tabular}{||l|c|l||}
\hline \hline \hline \hline
\textbf{Test} & \textbf{Amplifier} & \textbf{ } & \textbf{General} \\ %\textbf{Test} & \textbf{Amplifier} & \textbf{ } & \textbf{General} \\
\textbf{Case} & \textbf{Effect} & \textbf{ } & \textbf{Symtom Description} \\ %\textbf{Case} & \textbf{Effect} & \textbf{ } & \textbf{Symtom Description} \\
\textbf{Failure} & \textbf{$SEC\_AMP$} & \textbf{Derived Component} \\
\textbf{cause} & \textbf{Amplifier Effect} & \textbf{Failure Mode} \\
% R & wire & res + & res - & description % R & wire & res + & res - & description
\hline \hline
\hline \hline
TC1: $OPAMP$ LatchUP & Output High & & AMPHigh \\ TC1: $OPAMP$ LatchUP & Output High & AMPHigh \\
TC2: $OPAMP$ LatchDown & Output Low : Low gain & & AMPLow \\ \hline TC2: $OPAMP$ LatchDown & Output Low : Low gain & AMPLow \\ \hline
TC3: $OPAMP$ No Operation & Output Low & & AMPLow \\ TC3: $OPAMP$ No Operation & Output Low & AMPLow \\
TC4: $OPAMP$ Low Slew & Low pass filtering & & LowPass \\ \hline TC4: $OPAMP$ Low Slew & Low pass filtering & LowPass \\ \hline
TC5: $R3\_open$ & +V2 follower & & AMPIncorrectOutput\\ \hline TC5: $R3\_open$ & +V2 follower & AMPIncorrectOutput\\ \hline
TC6: $R3\_short$ & Undefined & & AMPIncorrectOutput \\ TC6: $R3\_short$ & Undefined & AMPIncorrectOutput \\
& (impedance of IC1 vs +V2) & & \\ \hline & (impedance of IC1 vs +V2) & \\ \hline
TC5: $R4\_open$ & High or Low output & & AMPIncorrectOutput \\ TC5: $R4\_open$ & High or Low output & AMPIncorrectOutput \\
& +V2$>$+V1 $\mapsto$ High & & \\ & +V2$>$+V1 $\mapsto$ High & \\
& +V1$>$+V2 $\mapsto$ Low & & \\ \hline & +V1$>$+V2 $\mapsto$ Low & \\ \hline
TC6: $R4\_short$ & +V2 follower & & AMPIncorrectOutput \\ \hline TC6: $R4\_short$ & +V2 follower & AMPIncorrectOutput \\ \hline
%TC7: $R_2$ OPEN & LOW & & LowPD \\ \hline %TC7: $R_2$ OPEN & LOW & & LowPD \\ \hline
\hline \hline
\end{tabular} \end{tabular}
@ -1114,19 +1129,22 @@ two derived components of the type $NI\_AMP$ and $SEC\_AMP$.
\centering % used for centering table \centering % used for centering table
\begin{tabular}{||l|c|c|l|l||} \begin{tabular}{||l|c|c|l|l||}
\hline \hline \hline \hline
\textbf{Test} & \textbf{Dual Amplifier} & \textbf{ } & \textbf{General} \\ %\textbf{Test} & \textbf{Dual Amplifier} & \textbf{ } & \textbf{General} \\
\textbf{Case} & \textbf{Effect} & \textbf{ } & \textbf{Symptom Description} \\ %\textbf{Case} & \textbf{Effect} & \textbf{ } & \textbf{Symptom Description} \\
\textbf{Failure} & \textbf{$DiffAMP$} & \textbf{Derived Component} \\
\textbf{cause} & \textbf{Effect} & \textbf{Failure Mode} \\
% R & wire & res + & res - & description % R & wire & res + & res - & description
\hline \hline
\hline \hline
TC1: $NI\_AMP$ AMPHigh & opamp 2 driven high & & DiffAMPLow \\ TC1: $NI\_AMP$ AMPHigh & opamp 2 driven high & DiffAMPLow \\
TC2: $NI\_AMP$ AMPLow & opamp 2 driven low & & DiffAMPHigh \\ TC2: $NI\_AMP$ AMPLow & opamp 2 driven low & DiffAMPHigh \\
TC3: $NI\_AMP$ LowPass & opamp 2 driven with lag & & DiffAMP\_LP \\ \hline TC3: $NI\_AMP$ LowPass & opamp 2 driven with lag & DiffAMP\_LP \\ \hline
TC4: $SEC\_AMP$ AMPHigh & Diff amplifier high & & DiffAMPHigh\\ TC4: $SEC\_AMP$ AMPHigh & Diff amplifier high & DiffAMPHigh\\
TC5: $SEC\_AMP$ AMPLow & Diff amplifier low & & DiffAMPLow \\ TC5: $SEC\_AMP$ AMPLow & Diff amplifier low & DiffAMPLow \\
TC6: $SEC\_AMP$ LowPass & Diff amplifier lag/lowpass & & DiffAMP\_LP \\ \hline TC6: $SEC\_AMP$ LowPass & Diff amplifier lag/lowpass & DiffAMP\_LP \\ \hline
TC7: $SEC\_AMP$ IncorrectOutput & Output voltage & & DiffAMPIncorrect \\ TC7: $SEC\_AMP$ IncorrectOutput & Output voltage & DiffAMPIncorrect \\
TC7: $SEC\_AMP$ & $ \neg (V2 - V1) $ & & \\ \hline TC7: $SEC\_AMP$ & $ \neg (V2 - V1) $ & \\ \hline
\hline \hline
\end{tabular} \end{tabular}
\label{ampfmea} \label{ampfmea}
@ -1229,14 +1247,18 @@ We analyse the first order low pass filter in table~\ref{tbl:firstorderlp}.\\
\caption{FirstOrderLP: Failure Mode Effects Analysis: Single Faults} % title of Table \caption{FirstOrderLP: Failure Mode Effects Analysis: Single Faults} % title of Table
\label{tbl:firstorderlp} \label{tbl:firstorderlp}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{First Order} & & \textbf{Symptom} \\ %\textbf{Failure Scenario} & & \textbf{First Order} & & \textbf{Symptom} \\
& & \textbf{Low Pass Filter} & & \\ % & & \textbf{Low Pass Filter} & & \\
\textbf{Failure} & \textbf{First Order} & \textbf{Derived Component} \\
\textbf{cause} & \textbf{Low Pass Filter} & \textbf{Failure Mode} \\
\hline \hline
FS1: R10 SHORT & & $No Filtering$ & & $LPnofilter$ \\ \hline FS1: R10 SHORT & $No Filtering$ & $LPnofilter$ \\ \hline
FS2: R10 OPEN & & $No Signal$ & & $LPnosignal$ \\ \hline FS2: R10 OPEN & $No Signal$ & $LPnosignal$ \\ \hline
FS3: C10 SHORT & & $No Signal$ & & $LPnosignal$ \\ \hline FS3: C10 SHORT & $No Signal$ & $LPnosignal$ \\ \hline
FS4: C10 OPEN & & $No Filtering$ & & $LPnofilter$ \\ \hline FS4: C10 OPEN & $No Filtering$ & $LPnofilter$ \\ \hline
\hline \hline
@ -1259,19 +1281,22 @@ from the $FirstOrderLP$ and the OP-AMP component.
\caption{First Stage LP1: Failure Mode Effects Analysis: Single Faults} % title of Table \caption{First Stage LP1: Failure Mode Effects Analysis: Single Faults} % title of Table
\label{tbl:firststage} \label{tbl:firststage}
\centering % used for centering table \centering % used for centering table
\begin{tabular}{||l|c|c|l|l||} \begin{tabular}{||l|c|l||}
\hline \hline \hline \hline
\textbf{Test} & \textbf{Circuit} & \textbf{ } & \textbf{General} \\ %\textbf{Test} & \textbf{Circuit} & \textbf{ } & \textbf{General} \\
\textbf{Case} & \textbf{Effect} & \textbf{ } & \textbf{Symptom Description} \\ %\textbf{Case} & \textbf{Effect} & \textbf{ } & \textbf{Symptom Description} \\
\textbf{Failure} & \textbf{First stage LP1} & \textbf{Derived Component} \\
\textbf{cause} & \textbf{Effect} & \textbf{Failure Mode} \\
% R & wire & res + & res - & description % R & wire & res + & res - & description
\hline \hline
\hline \hline
TC1: $OPAMP$ LatchUP & Output High & & LP1High \\ TC1: $OPAMP$ LatchUP & Output High & LP1High \\
TC2: $OPAMP$ LatchDown & Output Low & & LP1Low \\ TC2: $OPAMP$ LatchDown & Output Low & LP1Low \\
TC3: $OPAMP$ No Operation & Output Low & & LP1Low \\ TC3: $OPAMP$ No Operation & Output Low & LP1Low \\
TC4: $OPAMP$ Low Slew & Unwanted Low pass filtering & & LP1filterincorrect \\ \hline TC4: $OPAMP$ Low Slew & Unwanted Low pass filtering & LP1filterincorrect \\ \hline
TC5: $LPnofilter $ & No low pass filtering & & LP1filterincorrect \\ TC5: $LPnofilter $ & No low pass filtering & LP1filterincorrect \\
TC6: $LPnosignal $ & No input signal & & LP1nosignal \\ \hline TC6: $LPnosignal $ & No input signal & LP1nosignal \\ \hline
\hline \hline
\hline \hline
@ -1307,28 +1332,31 @@ We can analyse the first one and then re-use these results for the second.
\begin{table}[ht] \begin{table}[ht]
\caption{Sallen Key Low Pass Filter SKLP: Failure Mode Effects Analysis: Single Faults} % title of Table \caption{Sallen Key Low Pass Filter SKLP: Failure Mode Effects Analysis: Single Faults} % title of Table
\centering % used for centering table \centering % used for centering table
\begin{tabular}{||l|c|c|l|l||} \begin{tabular}{||l|c|l||}
\hline \hline \hline \hline
\textbf{Test} & \textbf{Circuit} & \textbf{ } & \textbf{General} \\ %\textbf{Test} & \textbf{Circuit} & \textbf{ } & \textbf{General} \\
\textbf{Case} & \textbf{Effect} & \textbf{ } & \textbf{Symptom Description} \\ %\textbf{Case} & \textbf{Effect} & \textbf{ } & \textbf{Symptom Description} \\
\textbf{Failure} & \textbf{SKLP} & \textbf{Derived Component} \\
\textbf{cause} & \textbf{Effect} & \textbf{Failure Mode} \\
% R & wire & res + & res - & description % R & wire & res + & res - & description
\hline \hline
\hline \hline
TC1: $OPAMP$ LatchUP & Output High & & SKLPHigh \\ TC1: $OPAMP$ LatchUP & Output High & SKLPHigh \\
TC2: $OPAMP$ LatchDown & Output Low & & SKLPLow \\ TC2: $OPAMP$ LatchDown & Output Low & SKLPLow \\
TC3: $OPAMP$ No Operation & Output Low & & SKLPLow \\ TC3: $OPAMP$ No Operation & Output Low & SKLPLow \\
TC4: $OPAMP$ Low Slew & Unwanted Low pass filtering & & SKLPfilterIncorrect \\ \hline TC4: $OPAMP$ Low Slew & Unwanted Low pass filtering & SKLPfilterIncorrect \\ \hline
TC5: R1 OPEN & No input signal & & SKLPfilterIncorrect \\ TC5: R1 OPEN & No input signal & SKLPfilterIncorrect \\
TC6: R1 SHORT & incorrect low pass filtering & & SKLPfilterIncorrect \\ \hline TC6: R1 SHORT & incorrect low pass filtering & SKLPfilterIncorrect \\ \hline
TC7: R2 OPEN & No input signal & & SKLPnosignal \\ TC7: R2 OPEN & No input signal & SKLPnosignal \\
TC8: R2 SHORT & incorrect low pass filtering & & SKLPfilterIncorrect \\ \hline TC8: R2 SHORT & incorrect low pass filtering & SKLPfilterIncorrect \\ \hline
TC9: C1 OPEN & reduced/incorrect low pass filtering & & SKLPfilterIncorrect\\ TC9: C1 OPEN & reduced/incorrect low pass filtering & SKLPfilterIncorrect\\
TC10: C1 SHORT & reduced/incorrect low pass filtering & & SKLPfilterIncorrect \\ \hline TC10: C1 SHORT & reduced/incorrect low pass filtering & SKLPfilterIncorrect \\ \hline
TC11: C2 OPEN & reduced/incorrect low pass filtering & & SKLPfilterIncorrect \\ TC11: C2 OPEN & reduced/incorrect low pass filtering & SKLPfilterIncorrect \\
TC12: C2 SHORT & No input signal, low signal & & SKLPnosignal \\ \hline TC12: C2 SHORT & No input signal, low signal & SKLPnosignal \\ \hline
\hline \hline
\hline \hline
\end{tabular} \end{tabular}
@ -1393,32 +1421,35 @@ We represent the desired FMMD hierarchy in figure~\ref{fig:circuit2h}.
%$$ fm(LP1) = \{ LP1High, LP1Low, LP1ExtraLowPass, LP1NoLowPass \} $$ %$$ fm(LP1) = \{ LP1High, LP1Low, LP1ExtraLowPass, LP1NoLowPass \} $$
\begin{table}[ht]+ \begin{table}[ht]+
\caption{Five Pole Low Pass Filter: Failure Mode Effects Analysis: Single Faults} % title of Table \caption{Five Pole Low Pass Filter: Failure Mode Effects Analysis($FivePoleLP$): Single Faults} % title of Table
\centering % used for centering table \centering % used for centering table
\begin{tabular}{||l|c|l|l|l||} \begin{tabular}{||l|c|l||}
\hline \hline \hline \hline
\textbf{Test} & \textbf{Circuit} & \textbf{ } & \textbf{General} \\ %\textbf{Test} & \textbf{Circuit} & \textbf{ } & \textbf{General} \\
\textbf{Case} & \textbf{Effect} & \textbf{ } & \textbf{Symptom Description} \\ %\textbf{Case} & \textbf{Effect} & \textbf{ } & \textbf{Symptom Description} \\
\textbf{Failure} & \textbf{$FivePoleLP$ } & \textbf{Derived Component} \\
\textbf{cause} & \textbf{Effect} & \textbf{Failure Mode} \\
% R & wire & res + & res - & description % R & wire & res + & res - & description
\hline \hline
\hline \hline
TC1: $LP1$ LP1High & signal HIGH & & HIGH \\ TC1: $LP1$ LP1High & signal HIGH & HIGH \\
TC2: $LP1$ SKLPLow & signal LOW & & LOW \\ TC2: $LP1$ SKLPLow & signal LOW & LOW \\
TC3: $LP1$ LP1filterIncorrect & filtering incorrect & & FilterIncorrect \\ TC3: $LP1$ LP1filterIncorrect & filtering incorrect & FilterIncorrect \\
TC4: $LP1$ LP1nosignal & no signal propagated & & NO\_SIGNAL \\ \hline TC4: $LP1$ LP1nosignal & no signal propagated & NO\_SIGNAL \\ \hline
TC5: $SKLP_1$ High & signal HIGH & & HIGH \\ TC5: $SKLP_1$ High & signal HIGH & HIGH \\
TC6: $SKLP_1$ Low & signal LOW & & LOW \\ TC6: $SKLP_1$ Low & signal LOW & LOW \\
TC7: $SKLP_1$ filterIncorrect & filtering incorrect & & FilterIncorrect \\ TC7: $SKLP_1$ filterIncorrect & filtering incorrect & FilterIncorrect \\
TC8: $SKLP_1$ nosignal & no signal propagated & & NO\_SIGNAL \\ \hline TC8: $SKLP_1$ nosignal & no signal propagated & NO\_SIGNAL \\ \hline
TC9: $SKLP_2$ High & signal HIGH & & HIGH \\ TC9: $SKLP_2$ High & signal HIGH & HIGH \\
TC10: $SKLP_2$ Low & signal LOW & & LOW \\ TC10: $SKLP_2$ Low & signal LOW & LOW \\
TC11: $SKLP_2$ filterIncorrect & filtering incorrect & & FilterIncorrect \\ TC11: $SKLP_2$ filterIncorrect & filtering incorrect & FilterIncorrect \\
TC12: $SKLP_2$ nosignal & no signal propagated & & NO\_SIGNAL \\ \hline TC12: $SKLP_2$ nosignal & no signal propagated & NO\_SIGNAL \\ \hline
\hline \hline
\hline \hline
@ -1509,15 +1540,18 @@ Our functional group for the phase shifter consists of a resistor and a capacito
\caption{PhaseShift: Failure Mode Effects Analysis: Single Faults} % title of Table \caption{PhaseShift: Failure Mode Effects Analysis: Single Faults} % title of Table
\label{tbl:firstorderlp} \label{tbl:firstorderlp}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{First Order} & & \textbf{Symptom} \\ % \textbf{Failure Scenario} & & \textbf{First Order} & & \textbf{Symptom} \\
& & \textbf{Low Pass Filter} & & \\ % & & \textbf{Low Pass Filter} & & \\
\textbf{Failure} & \textbf{$PHS45$ } & \textbf{Derived Component} \\
\textbf{cause} & \textbf{Effect} & \textbf{Failure Mode} \\
\hline \hline
FS1: R SHORT & & 0 degree's of phase shift & & $0\_phaseshift$ \\ \hline FS1: R SHORT & 0 degree's of phase shift & $0\_phaseshift$ \\ \hline
% 90 degree's of phase shift & & $90\_phaseshift$ \\ \hline % 90 degree's of phase shift & & $90\_phaseshift$ \\ \hline
FS2: R OPEN & & No Signal & & $nosignal$ \\ \hline FS2: R OPEN & No Signal & $nosignal$ \\ \hline
FS3: C SHORT & & Grounded,No Signal & & $nosignal$ \\ \hline FS3: C SHORT & Grounded,No Signal & $nosignal$ \\ \hline
FS4: C OPEN & & 0 degree's of phase shift & & $0\_phaseshift$ \\ \hline FS4: C OPEN & 0 degree's of phase shift & $0\_phaseshift$ \\ \hline
\hline \hline
@ -1580,8 +1614,12 @@ or in Euler diagram format as in figure~\ref{fig:bubbaeuler1}.
\label{tbl:bubbalargefg} \label{tbl:bubbalargefg}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{Bubba} & & \textbf{Symptom} \\ % \textbf{Failure Scenario} & & \textbf{Bubba} & & \textbf{Symptom} \\
& & \textbf{Oscillator} & & \\ % & & \textbf{Oscillator} & & \\
\textbf{Failure} & & \textbf{$BubbaOscillator$ } & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{Effect} & & \textbf{Failure Mode} \\
\hline \hline
@ -1683,7 +1721,7 @@ We should be able to determine smaller {\fgs} and refine the model further.
\end{figure} \end{figure}
% %
We take the $NIBUFF$ and $PHS45$ We take the pre-analysed $NIBUFF$ and $PHS45$
{\dcs} into a {\fg} giving the {\dc} $BUFF45$. {\dcs} into a {\fg} giving the {\dc} $BUFF45$.
$BUFF45$ is a {\dc} representing an actively buffered $45^{\circ}$ phase shifter. $BUFF45$ is a {\dc} representing an actively buffered $45^{\circ}$ phase shifter.
and with those three, form a $PHS135BUFFERED$ and with those three, form a $PHS135BUFFERED$
@ -1713,8 +1751,11 @@ Finally we can merge $PHS135BUFFERED$ and $PHS225AMP$ in a final stage (see fig
\label{tbl:buff45} \label{tbl:buff45}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{BUFF45} & & \textbf{Symptom} \\ %\textbf{Failure Scenario} & & \textbf{BUFF45} & & \textbf{Symptom} \\
& & & & \\ % & & & & \\
\textbf{Failure} & & \textbf{$BUFF45$ } & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{Effect} & & \textbf{Failure Mode} \\
\hline \hline
FS1: $PHS45_1$ $0\_phaseshift$ & & phase shift low & & $0\_phaseshift$ \\ FS1: $PHS45_1$ $0\_phaseshift$ & & phase shift low & & $0\_phaseshift$ \\
FS2: $PHS45_1$ $no\_signal$ & & signal lost & & $NO_{signal}$ \\ FS2: $PHS45_1$ $no\_signal$ & & signal lost & & $NO_{signal}$ \\
@ -1745,8 +1786,12 @@ We can now combine three $BUFF45$ {\dcs} and create a $PHS135BUFFERED$ {\dc}.
\label{tbl:phs135buffered} \label{tbl:phs135buffered}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{PHS135 Buffered} & & \textbf{Symptom} \\ %\textbf{Failure Scenario} & & \textbf{PHS135 Buffered} & & \textbf{Symptom} \\
& & & & \\ % & & & & \\
\textbf{Failure} & & \textbf{$PHS135BUFFERED$ } & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{Effect} & & \textbf{Failure Mode} \\
\hline \hline
FS1: $PHS45_1$ $0\_phaseshift$ & & phase shift low & & $90\_phaseshift$ \\ FS1: $PHS45_1$ $0\_phaseshift$ & & phase shift low & & $90\_phaseshift$ \\
FS2: $PHS45_1$ $no\_signal$ & & signal lost & & $NO_{signal}$ \\ FS2: $PHS45_1$ $no\_signal$ & & signal lost & & $NO_{signal}$ \\
@ -1778,15 +1823,19 @@ $$
% %
% %
% %
The $PHS225AMP$ consists of a $PHS45$ and an $INVAMP$ (which provides $180^{\circ}$ of phase shift). The $PHS225AMP$ consists of a $PHS45$, providing $45^{\circ}$ of phase shift, and an
$INVAMP$, providing $180^{\circ}$ giving a total of $225^{\circ}$.
% %
\begin{table}[h+] \begin{table}[h+]
\caption{PHS225AMP: Failure Mode Effects Analysis} % title of Table \caption{PHS225AMP: Failure Mode Effects Analysis} % title of Table
\label{tbl:phs225amp} \label{tbl:phs225amp}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{PHS225AMP} & & \textbf{Symptom} \\ %\textbf{Failure Scenario} & & \textbf{PHS225AMP} & & \textbf{Symptom} \\
& & \textbf{Oscillator} & & \\ % & & \textbf{Oscillator} & & \\
\textbf{Failure} & & \textbf{$PHS225AMP$ } & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{Effect} & & \textbf{Failure Mode} \\
\hline \hline
FS1: $PHS45_1$ $0\_phaseshift$ & & phase shift low & & $180\_phaseshift$ \\ FS1: $PHS45_1$ $0\_phaseshift$ & & phase shift low & & $180\_phaseshift$ \\
FS2: $PHS45_1$ $no\_signal$ & & signal lost & & $NO_{signal}$ \\ FS2: $PHS45_1$ $no\_signal$ & & signal lost & & $NO_{signal}$ \\
@ -1814,15 +1863,19 @@ The $PHS225AMP$ consists of a $PHS45$ and an $INVAMP$ (which provides $180^{\cir
% %
% %
To complete the analysis we now bring the derived components $PHS135BUFFERED$ and $PHS225AMP$ together To complete the analysis we now bring the derived components $PHS135BUFFERED$ and $PHS225AMP$ together
and perform FMEA with these. and perform FMEA with these, to obtain a model for the Bubba Oscillator.
% %
\begin{table}[h+] \begin{table}[h+]
\caption{BUBBAOSC: Failure Mode Effects Analysis} % title of Table \caption{BUBBAOSC: Failure Mode Effects Analysis} % title of Table
\label{tbl:bubba2} \label{tbl:bubba2}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{BUBBAOSC} & & \textbf{Symptom} \\ %\textbf{Failure Scenario} & & \textbf{BUBBAOSC} & & \textbf{Symptom} \\
& & & & \\ % & & & & \\
\textbf{Failure} & & \textbf{$BUBBAOSC$ } & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{Effect} & & \textbf{Failure Mode} \\
\hline \hline
%FS1: $PHS135BUFFERED$ $180\_phaseshift$ & & phase shift high & & $LO_{fosc}$ \\ %FS1: $PHS135BUFFERED$ $180\_phaseshift$ & & phase shift high & & $LO_{fosc}$ \\
FS1: $PHS135BUFFERED$ $no\_signal$ & & signal lost & & $NO_{osc}$ \\ FS1: $PHS135BUFFERED$ $no\_signal$ & & signal lost & & $NO_{osc}$ \\
@ -1976,12 +2029,16 @@ $$G^0_1 = \{R1, R2 \}$$
\begin{table}[h+] \begin{table}[h+]
\center \center
\caption{ Summing Junction Integrator: Failure Mode Effects Analysis} % title of Table \caption{ Summing Junction Integrator($SUMJINT$): Failure Mode Effects Analysis} % title of Table
\label{tbl:sumjint} \label{tbl:sumjint}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{failure result} & & \textbf{Symptom} \\ %\textbf{Failure Scenario} & & \textbf{failure result} & & \textbf{Symptom} \\
& & & & \\ % & & & & \\
\textbf{Failure} & & \textbf{$SUMJINT$ } & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{Effect} & & \textbf{Failure Mode} \\
\hline\hline \hline\hline
FS1: $R1$ $OPEN$ & & $V_{in}$ dominates input & & $V_{in} DOM$ \\ FS1: $R1$ $OPEN$ & & $V_{in}$ dominates input & & $V_{in} DOM$ \\
FS2: $R1$ $SHORT$ & & $V_{fb}$ dominates input & & $V_{fb} DOM$ \\ \hline FS2: $R1$ $SHORT$ & & $V_{fb}$ dominates input & & $V_{fb} DOM$ \\ \hline
@ -2070,8 +2127,11 @@ It therefore has the failure modes of an Op-amp.
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{failure result} & & \textbf{Symptom} \\ %\textbf{Failure Scenario} & & \textbf{failure result} & & \textbf{Symptom} \\
& & & & \\ % & & & & \\
\textbf{Failure} & & \textbf{$HISB$ } & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{Effect} & & \textbf{Failure Mode} \\
\hline\hline \hline\hline
FS5: $IC2$ $HIGH$ & & output perm. high & & HIGH \\ FS5: $IC2$ $HIGH$ & & output perm. high & & HIGH \\
@ -2125,8 +2185,12 @@ We now analyse the {\fg} $G^1$ in table~\ref{tbl:DS2AS}.
\label{tbl:DS2AS} \label{tbl:DS2AS}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{failure result } & & \textbf{Symptom} \\ %\textbf{Failure Scenario} & & \textbf{failure result } & & \textbf{Symptom} \\
& & & & \\ % & & & & \\
% & & & & \\
\textbf{Failure} & & \textbf{$DS2AL$ } & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{Effect} & & \textbf{Failure Mode} \\
\hline \hline \hline \hline
FS1: $PD^1$ $HIGH$ & & output perm. low & & LOW \\ FS1: $PD^1$ $HIGH$ & & output perm. low & & LOW \\
FS2: $PD^1$ $LOW$ & & output perm. low & & HIGH \\ \hline FS2: $PD^1$ $LOW$ & & output perm. low & & HIGH \\ \hline
@ -2214,12 +2278,17 @@ $$ G^1_0 = \{ BFINT^1, SUMJ^1 \} $$
%$$ fm(SUMJ) = \{ V_{in} DOM, V_{fb} DOM \} .$$ %$$ fm(SUMJ) = \{ V_{in} DOM, V_{fb} DOM \} .$$
\begin{table}[h+] \begin{table}[h+]
\caption{ $BFINT^1, SUMJ^1$ buffered integrating summing junction: Failure Mode Effects Analysis} % title of Table \caption{ $BFINT^1, SUMJ^1$ buffered integrating summing junction($BISJ$): Failure Mode Effects Analysis} % title of Table
\label{tbl:DS2AS} \label{tbl:DS2AS}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{failure result } & & \textbf{Symptom} \\ % \textbf{Failure Scenario} & & \textbf{failure result } & & \textbf{Symptom} \\
& & & & \\ % & & & & \\
% & & & & \\
\textbf{Failure} & & \textbf{$BISJ$ } & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{Effect} & & \textbf{Failure Mode} \\
\hline \hline \hline \hline
FS1: $SUMJ^1$ $V_{in} DOM$ & & output integral of $V_{in}$ & & $OUTPUT STUCK$ \\ FS1: $SUMJ^1$ $V_{in} DOM$ & & output integral of $V_{in}$ & & $OUTPUT STUCK$ \\
FS2: $SUMJ^1$ $V_{fb} DOM$ & & output integral of $V_{fb}$ & & $OUTPUT STUCK$ \\ \hline FS2: $SUMJ^1$ $V_{fb} DOM$ & & output integral of $V_{fb}$ & & $OUTPUT STUCK$ \\ \hline
@ -2261,20 +2330,25 @@ $ G^2_1 = \{ IC4^0, DL2AL^2, CLOCK\} $
We analyse the buffered flip flop circuitry in table~\ref{tbl:FFB}. We analyse the buffered flip flop circuitry in table~\ref{tbl:FFB}.
\begin{table}[h+] \begin{table}[h+]
\caption{ $IC4^0,DL2AL^2$ flip flop buffered: Failure Mode Effects Analysis} % title of Table \caption{ $IC4^0,DL2AL^2$ flip flop buffered($FFB$): Failure Mode Effects Analysis} % title of Table
\label{tbl:FFB} \label{tbl:FFB}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{failure result } & & \textbf{Symptom} \\ %\textbf{Failure Scenario} & & \textbf{failure result } & & \textbf{Symptom} \\
& & & & \\ % & & & & \\
% & & & & \\
\textbf{Failure} & & \textbf{$FFB$ } & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{Effect} & & \textbf{Failure Mode} \\
\hline \hline \hline \hline
FS1: $IC4^0$ $HIGH$ & & output stuck high & & $OUTPUT STUCK$ \\ FS1: $IC4^0$ $HIGH$ & & output stuck high & & $OUTPUT STUCK$ \\
FS2: $IC4^0$ $LOW$ & & output stuck low & & $OUTPUT STUCK$ \\ FS2: $IC4^0$ $LOW$ & & output stuck low & & $OUTPUT STUCK$ \\
FS3: $IC4^0$ $NOOP$ & & output stuck low & & $OUTPUT STUCK$ \\ \hline FS3: $IC4^0$ $NOOP$ & & output stuck low & & $OUTPUT STUCK$ \\ \hline
%\hline %\hline
FS4: $DL2AL^2$ $LOW$ & & output perm. high & & $OUTPUT STUCK$ \\ FS4: $DL2AL^2$ $LOW$ & & output perm. high & & $OUTPUT STUCK$ \\
FS5: $DL2AL^2$ $HIGH$ & & output perm. low & & $OUTPUT STUCK$ \\ \hline FS5: $DL2AL^2$ $HIGH$ & & output perm. low & & $OUTPUT STUCK$ \\ \hline
FS6: $DL2AL^2$ $LOW\_SLEW$ & & no current drive & & $LOW\_SLEW$ \\ FS6: $DL2AL^2$ $LOW\_SLEW$ & & no current drive & & $LOW\_SLEW$ \\
FS7: $CLOCK^0$ $STOPPED$ & & output stuck & & $OUTPUT STUCK$ \\ FS7: $CLOCK^0$ $STOPPED$ & & output stuck & & $OUTPUT STUCK$ \\
\hline \hline
@ -2297,12 +2371,16 @@ We analyse the buffered {\sd} circuit in table~\ref{tbl:FFB}.
% BISJ^2 $\{ OUTPUT STUCK , REDUCED\_INTEGRATION \}$ % BISJ^2 $\{ OUTPUT STUCK , REDUCED\_INTEGRATION \}$
% %
\begin{table}[h+] \begin{table}[h+]
\caption{ $FFB^3, BISJ^2$ \sd : Failure Mode Effects Analysis} % title of Table \caption{ $FFB^3, BISJ^2$ \sd ($SDADC$): Failure Mode Effects Analysis} % title of Table
\label{tbl:sd} \label{tbl:sd}
\begin{tabular}{|| l | l | c | c | l ||} \hline \begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Scenario} & & \textbf{failure result } & & \textbf{Symptom} \\ %\textbf{Failure Scenario} & & \textbf{failure result } & & \textbf{Symptom} \\
& & & & \\ % & & & & \\
% & & & & \\
\textbf{Failure} & & \textbf{$FFB$ } & & \textbf{Derived Component} \\
\textbf{cause} & & \textbf{Effect} & & \textbf{Failure Mode} \\
\hline \hline \hline \hline
FS1: $FFB^3$ $OUTPUT STUCK$ & & value max high or low & & $OUTPUT\_OUT\_OF\_RANGE$ \\ FS1: $FFB^3$ $OUTPUT STUCK$ & & value max high or low & & $OUTPUT\_OUT\_OF\_RANGE$ \\
FS2: $FFB^3$ $LOW\_SLEW$ & & values will appear larger & & $OUTPUT\_INCORRECT$ \\ FS2: $FFB^3$ $LOW\_SLEW$ & & values will appear larger & & $OUTPUT\_INCORRECT$ \\
@ -2320,7 +2398,7 @@ We analyse the buffered {\sd} circuit in table~\ref{tbl:FFB}.
We now collect the symptoms for the \sd $ \; We now collect the symptoms for the \sd $ \;
\{OUTPUT\_OUT\_OF\_RANGE, OUTPUT\_INCORRECT\}$. \{OUTPUT\_OUT\_OF\_RANGE, OUTPUT\_INCORRECT\}$.
We can now create a {\dc} to represent the analogue to digital converter, $SADC^4$. We can now create a {\dc} to represent the analogue to digital converter, $SADC^4$.
$$fm(SADC^4) = \{OUTPUT\_OUT\_OF\_RANGE, OUTPUT\_INCORRECT\}$$ $$fm(SSDADC^4) = \{OUTPUT\_OUT\_OF\_RANGE, OUTPUT\_INCORRECT\}$$
We now show the final hierarchy in figure~\ref{fig:sdadc}. We now show the final hierarchy in figure~\ref{fig:sdadc}.
@ -2507,7 +2585,7 @@ in effect a failure mode of `one of its components'.
\paragraph{Mapping contract `post-condition' violations to symptoms.} \paragraph{Mapping contract `post-condition' violations to symptoms.}
A post condition is a definition of correct behaviour by a function. A post condition is a definition of correct behaviour by a function.
A violated post condition is a symptom of failure of a function. A violated post condition is a symptom of failure, or derived failure mode, of a function.
Post conditions could be either actions performed (i.e. the state of hardware changed) or an output value of a function. Post conditions could be either actions performed (i.e. the state of hardware changed) or an output value of a function.
\paragraph{Mapping contract `invariant' violations to symptoms and failure modes.} \paragraph{Mapping contract `invariant' violations to symptoms and failure modes.}
@ -2642,7 +2720,8 @@ Its job is to select the correct channel (ADC multiplexer) and then to initiate
conversion by setting an ADC 'go' bit (see code sample in figure~\ref{fig:code_read_ADC}). conversion by setting an ADC 'go' bit (see code sample in figure~\ref{fig:code_read_ADC}).
% %
It takes the raw ADC reading and converts it into a It takes the raw ADC reading and converts it into a
floating point\footnote{the type, `double' or `double precision', is a standard C language floating point type~\cite{DBLP:books/ph/KernighanR88}.} floating point\footnote{the type, `double' or `double precision', is a
standard C language floating point type~\cite{DBLP:books/ph/KernighanR88}.}
voltage value. voltage value.
@ -2762,9 +2841,15 @@ With these failure modes, we can analyse our first functional group, see table~\
\label{tbl:cmatv} \label{tbl:cmatv}
\begin{tabular}{|| l | c | l ||} \hline \begin{tabular}{|| l | c | l ||} \hline
\textbf{Failure} & \textbf{failure} & \textbf{Symptom} \\ %\textbf{Failure} & \textbf{failure} & \textbf{Symptom} \\
\textbf{Scenario} & \textbf{effect} & \textbf{ADC } \\ \hline %\textbf{Scenario} & \textbf{effect} & \textbf{ADC } \\ \hline
\hline % & & & & \\
\textbf{Failure} & \textbf{Failure } & \textbf{Derived Component} \\
\textbf{cause} & \textbf{Effect} & \textbf{Failure Mode} \\
\hline \hline
1: $R_{OPEN}$ & resistor open, & $HIGH$ \\ 1: $R_{OPEN}$ & resistor open, & $HIGH$ \\
& voltage on pin high & \\ \hline & voltage on pin high & \\ \hline
@ -2847,8 +2932,13 @@ We now analyse this hardware/software combined {\fg}.
\label{tbl:radc} \label{tbl:radc}
\begin{tabular}{|| l | c | l ||} \hline \begin{tabular}{|| l | c | l ||} \hline
\textbf{Failure} & \textbf{failure} & \textbf{Symptom} \\ % \textbf{Failure} & \textbf{failure} & \textbf{Symptom} \\
\textbf{Scenario} & \textbf{effect} & \textbf{RADC } \\ \hline % \textbf{Scenario} & \textbf{effect} & \textbf{RADC } \\ \hline
\textbf{Failure} & \textbf{Failure } & \textbf{Derived Component} \\
\textbf{cause} & \textbf{Effect} & \textbf{Failure Mode} \\
\hline \hline
1: ${CHAN\_NO}$ & wrong voltage & $VV\_ERR$ \\ 1: ${CHAN\_NO}$ & wrong voltage & $VV\_ERR$ \\
& read & \\ \hline & read & \\ \hline
@ -2917,8 +3007,13 @@ software component $read\_4\_20\_input$, i.e. $G_3 = \{read\_4\_20\_input, RADC\
\label{tbl:r420i} \label{tbl:r420i}
\begin{tabular}{|| l | c | l ||} \hline \begin{tabular}{|| l | c | l ||} \hline
\textbf{Failure} & \textbf{failure} & \textbf{Symptom} \\ % \textbf{Failure} & \textbf{failure} & \textbf{Symptom} \\
\textbf{Scenario} & \textbf{effect} & \textbf{RADC } \\ \hline % \textbf{Scenario} & \textbf{effect} & \textbf{RADC } \\ \hline
\hline
\textbf{Failure} & \textbf{Failure } & \textbf{Derived Component} \\
\textbf{cause} & \textbf{Effect} & \textbf{Failure Mode} \\
\hline \hline
1: $RI_{VRGE}$ & voltage & $OUT\_OF\_$ \\ 1: $RI_{VRGE}$ & voltage & $OUT\_OF\_$ \\
& outside range & $RANGE$ \\ \hline & outside range & $RANGE$ \\ \hline
@ -3012,7 +3107,9 @@ With this analysis
we have a complete `reasoning~path' linking the failures modes from the we have a complete `reasoning~path' linking the failures modes from the
electronics to those in the software. electronics to those in the software.
Each functional group to {\dc} transition represents a Each functional group to {\dc} transition represents a
reasoning stage. AEach reasoning stage will have an associated analysis report. reasoning stage.
%
Each reasoning stage will have an associated analysis report.
% %