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getting very sleepy vision a bit blurred

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Robin Clark 2013-09-26 23:22:25 +01:00
parent 7d8832df44
commit bda19ba4d7
3 changed files with 6 additions and 4 deletions
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4
submission_thesis/CH5_Examples/copy.tex
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@ -1864,7 +1864,7 @@ a narrow temperature range, being mounted on a PCB.
%\glossary{{PCB}{Printed Circuit Board}} %\glossary{{PCB}{Printed Circuit Board}}
% %
To calculate the resistance of the Pt100 element % (and thus derive its temperature), To calculate the resistance of the Pt100 element % (and thus derive its temperature),
the voltage over it---i.e. $ sense+ \; - \; sense-$---is read the voltage over it, i.e. sense+ minus sense-, is read
and with the current flowing through it, its resistance can be found. and with the current flowing through it, its resistance can be found.
%must be measured. %must be measured.
% %
@ -2020,7 +2020,7 @@ for the circuit shown in figure \ref{fig:vd}.
\paragraph{Proof of Out of Range Values for Failures.} \paragraph{Proof of Out of Range Values for Failures.}
\label{pt110range} \label{pt110range}
% %
Using the temperature ranges defined above the voltages read can be used to verify correct operation of the circuit; Using the temperature ranges defined above the voltages calculated can be used to verify correct operation of the circuit;
it is shown that the resistor failures, OPEN and SHORT, would cause it is shown that the resistor failures, OPEN and SHORT, would cause
`out~of~range' voltages. `out~of~range' voltages.
% %

3
submission_thesis/appendixes/algorithmic.tex
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@ -630,7 +630,8 @@ component created in the next stage.
} }
{ {
Ensuring that no result belongs to more than one symptom Ensuring that no result belongs to more than one symptom
set enforces the `unitary state failure mode constraint' for derived components (see section~\ref{sec:unitarystate}). %set <-------------------------------------------- HOW did the word set get in here!!!!!!!! Totally screwed up the meaning 26SEP2013
enforces the `unitary state failure mode constraint' for derived components (see section~\ref{sec:unitarystate}).
} }
\fmmdgloss \fmmdgloss
%% Interesting to draw a graph here. %% Interesting to draw a graph here.

3
submission_thesis/appendixes/detailed_analysis.tex
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@ -589,7 +589,8 @@ FMMD analysis tables from chapter~\ref{sec:chap6}.
FC4: $RADC_{LOW}$ & ADC may read & $VOLTAGE\_LOW$ \\ \hline FC4: $RADC_{LOW}$ & voltage value & $VOLTAGE\_LOW$ \\
& from ADC value low & \\ \hline
FC5: post condition fails & software failure & $VAL\_ERR$ \\ FC5: post condition fails & software failure & $VAL\_ERR$ \\
in function read\_ADC & read\_ADC & \\ \hline in function read\_ADC & read\_ADC & \\ \hline