robin/Robin_PHD
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

FFFUIUUCKKC ARRRRGGHHHHH I hate this fucking phd.

Browse Source
This commit is contained in:
Robin P. Clark 2012-09-03 18:14:58 +01:00
parent f5a7928639
commit a7f54449a7
2 changed files with 82 additions and 65 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

140
submission_thesis/CH4_FMMD/copy.tex
View File

@ -63,16 +63,24 @@ description using UML class models.
% This chapter defines the FMMD process and related concepts and calculations.
FMMD is in essence modularised FMEA. Rather than taking each component failure mode
and extrapolating top level or system failure symptoms from it,
small groups of components are collected into {\fgs} and analysed,
and then {\dcs} are used to represent the {\fgs}.
These {\dcs} are used to then build further {\fgs} until a hierarchy of {\fgs}
small groups of components are collected into {\fgs} and analysed.
%and then {\dcs} are used to represent the {\fgs}.
We analyse the {\fgs} in order to determine its the failure mode behaviour.
%of the {\fg}.
With the failure mode behaviour we can obtain a set of failure modes
for the {\fg}. We can then create a new theoretical component to represent the {\fg}.
We call this a {\dc}.
This {\dc} may be used as though it were a component, and has a set of failure modes.
We then use {\dcs} to then build further {\fgs} until a hierarchy of {\fgs}
and {\dcs} has been built, converging to a final {\dc}
at the top of the hierarchy.
at the top of the hierarchy. The final {\dcs} failure modes
are the failure modes of the system under investigation.
%
Or in other words we take the traditional FMEA~\cite{sccs}[pp.34-38] process, and modularise it.
We break down each stage of reasoning
into small manageable groups, and use the results of those groups, as {\dcs}
to build higher level groups.
Or in other words we take the traditional FMEA~\cite{sccs}[pp.34-38] process, and modularise it from the bottom-up.
%We break down each stage of reasoning
%into small manageable groups, and use the failure mode behaviour from them to create {\dcs}
%to build higher level groups.
In this way we can incrementally analyse an entire system.
% %This has advantages of concentrating
% %effort in where modules interact,
%A notation is then described to index and classify objects created in FMMD hierarchical models.
@ -470,7 +478,7 @@ to build higher level groups.
To demonstrate the principles of FMMD, we use it to analyse a
commonly used circuit, the non-inverting op amp~\cite{aoe}[p.234], shown in figure \ref{fig:noninvamp}.
commonly used circuit, a non-inverting amplifier built from an op amp~\cite{aoe}[p.234] and two resistors, a circuit schematic for this is shown in figure \ref{fig:noninvamp}.
%
\begin{figure}[h+]
\centering
@ -482,7 +490,7 @@ commonly used circuit, the non-inverting op amp~\cite{aoe}[p.234], shown in fig
\end{figure}
%
The function of the resistors in this circuit is to set the amplifier gain.
They operate as a potential divider, the resistors act as a potential divider assuming the op-amp has high impedance,
They operate as a potential divider, the resistors act as a potential divider --- assuming the op-amp has high impedance ---
and program the inverting input on the op-amp
to balance them against the positive input, giving the voltage gain ($G_v$)
defined by $ G_v = 1 + \frac{R2}{R1} $ at the output.
@ -532,9 +540,10 @@ and determine how they affect the operation of the potential divider.
%
%%For this example we look at single failure modes only.
For each failure mode in our {\fg} `potential~divider',
we can assign a {\fc} number (see table \ref{tbl:pdfmea}).
Each {\fc} is analysed to determine the `symptom'
of the potential dividers' operation. For instance
we can assign a %{\fc}
number (see table \ref{tbl:pdfmea}).
Each {\fc} is analysed to determine the symptom of failure in
the potential dividers' operation. For instance
if resistor $R_1$ were to become open, then the potential~divider would not be grounded and the
voltage output from it would float high (+ve).
This would mean the symptom of the failed potential divider would be voltage high output.
@ -556,15 +565,15 @@ for it outputting a low voltage `LowPD'. % Andrew asked for this to be defined b
%\textbf{Failure} & \textbf{Pot.Div} & \textbf{Symptom} \\
%\textbf{scenario} & \textbf{Effect} & \textbf{Description} \\
\textbf{Fault} & \textbf{Pot.Div} & \textbf{Derived Component} \\ % \textbf{Symptom} \\
\textbf{Mode} & \textbf{Effect} & \textbf{Failure modes} \\ %\textbf{Description} \\
\textbf{Failure } & \textbf{Pot.Div} & \textbf{Derived Component} \\ % \textbf{Symptom} \\
\textbf{Cause} & \textbf{Effect} & \textbf{Failure modes} \\ %\textbf{Description} \\
% R & wire & res + & res - & description
\hline
\hline
FS1: $R_1$ SHORT & LOW & LowPD \\
FS2: $R_1$ OPEN & HIGH & HighPD \\ \hline
FS3: $R_2$ SHORT & HIGH & HighPD \\
FS4: $R_2$ OPEN & LOW & LowPD \\ \hline
FC1: $R_1$ SHORT & LOW & LowPD \\
FC2: $R_1$ OPEN & HIGH & HighPD \\ \hline
FC3: $R_2$ SHORT & HIGH & HighPD \\
FC4: $R_2$ OPEN & LOW & LowPD \\ \hline
\hline
\end{tabular}
\label{tbl:pdfmea}
@ -645,14 +654,14 @@ We represent the {\dc} \textbf{PD}, as a DAG in figure \ref{fig:dc1dag}.
%We could represent it algebraically thus: $ \derivec(PotDiv) =
% FUCKING HELL THIS IS to be REMOVED TOO : CUNTS
\begin{figure}[h+]
\centering
\includegraphics[width=200pt,keepaspectratio=true]{./CH4_FMMD/dc1.png}
% dc1.jpg: 430x619 pixel, 72dpi, 15.17x21.84 cm, bb=0 0 430 619
\caption{From functional group to derived component, a hierarchical diagram showing how the {\fg} is analysed using the $\derivec$
manual process and from this the {\dc} is created.}
\label{fig:dc1}
\end{figure}
% \begin{figure}[h+]
% \centering
% \includegraphics[width=200pt,keepaspectratio=true]{./CH4_FMMD/dc1.png}
% % dc1.jpg: 430x619 pixel, 72dpi, 15.17x21.84 cm, bb=0 0 430 619
% \caption{From functional group to derived component, a hierarchical diagram showing how the {\fg} is analysed using the $\derivec$
% manual process and from this the {\dc} is created.}
% \label{fig:dc1}
% \end{figure}
% We can now represent the potential divider as a {\dc}.
@ -660,24 +669,24 @@ We represent the {\dc} \textbf{PD}, as a DAG in figure \ref{fig:dc1dag}.
% we can treat these as the failure modes of a new {\dc}.
% We can represent this as a DAG (see figure \ref{fig:dc1dag}).
\begin{figure}[h+]
\centering
\begin{tikzpicture}[shorten >=1pt,->,draw=black!50, node distance=\layersep]
\tikzstyle{every pin edge}=[<-,shorten <=1pt]
\tikzstyle{fmmde}=[circle,fill=black!25,minimum size=30pt,inner sep=0pt]
\tikzstyle{component}=[fmmde, fill=green!50];
\tikzstyle{failure}=[fmmde, fill=red!50];
\tikzstyle{symptom}=[fmmde, fill=blue!50];
\tikzstyle{annot} = [text width=4em, text centered]
\node[component] (PD) at (0,-0.8) {{\em PD}};
\node[symptom] (PDHIGH) at (\layersep,-0) {$PD_{HIGH}$};
\node[symptom] (PDLOW) at (\layersep,-1.6) {$PD_{LOW}$};
\path (PD) edge (PDHIGH);
\path (PD) edge (PDLOW);
\end{tikzpicture}
\caption{DAG representing the {\dc} Potential Divider (PD) and its failure modes.}
\label{fig:dc1dag}
\end{figure}
% \begin{figure}[h+]
% \centering
% \begin{tikzpicture}[shorten >=1pt,->,draw=black!50, node distance=\layersep]
% \tikzstyle{every pin edge}=[<-,shorten <=1pt]
% \tikzstyle{fmmde}=[circle,fill=black!25,minimum size=30pt,inner sep=0pt]
% \tikzstyle{component}=[fmmde, fill=green!50];
% \tikzstyle{failure}=[fmmde, fill=red!50];
% \tikzstyle{symptom}=[fmmde, fill=blue!50];
% \tikzstyle{annot} = [text width=4em, text centered]
% \node[component] (PD) at (0,-0.8) {{\em PD}};
% \node[symptom] (PDHIGH) at (\layersep,-0) {$PD_{HIGH}$};
% \node[symptom] (PDLOW) at (\layersep,-1.6) {$PD_{LOW}$};
% \path (PD) edge (PDHIGH);
% \path (PD) edge (PDLOW);
% \end{tikzpicture}
% \caption{DAG representing the {\dc} Potential Divider (PD) and its failure modes.}
% \label{fig:dc1dag}
% \end{figure}
% The derived component is defined by its failure modes and
% the functional group used to derive it.
@ -689,16 +698,19 @@ as a building block for other {\fgs} in the same way as we used the base compone
\paragraph{Failure Mode Analysis of a generic op-amp}
\clearpage
%\clearpage
Let us now consider the op-amp as a {\bc}. According to
FMD-91~\cite{fmd91}[3-116] an op amp may have the following failure modes (with assigned probabilities):
latch-up(12.5\%), latch-down(6\%), no-operation(31.3\%), low~slew~rate(50\%).
FMD-91~\cite{fmd91}[3-116] an op amp may have the following failure modes %(with assigned probabilities):
latch-up (l\_up), where the output voltage is stuck at high , % (12.5\%),
latch-down (l\_dn), where the output voltage is stuck low, %(6\%),
no-operation (noop), where the op-amp cannot drive the output, %(31.3\%),
and low~slew~rate (lowslew) where the op-amp cannot react quickly to changes on its inputs. %(50\%).
\nocite{mil1991}
%\ifthenelse {\boolean{dag}}
%{
\clearpage
%\clearpage
We can represent these failure modes on a DAG (see figure~\ref{fig:op1dag}).
\begin{figure}[h+]
\centering
@ -733,8 +745,8 @@ We can represent these failure modes on a DAG (see figure~\ref{fig:op1dag}).
%}
%\clearpage
%\paragraph{Modelling the OP amp with the potential divider.}
We now collect the OP amp and the {\dc} {\em PD} to % andrew critised this sentence but it made sense to Chris and I
form a {\fg} to represent the non-inverting amplifier.
We now bring the op-amp and the {\dc} {\em PD} together to % andrew heavily critised this sentence but it made sense to Chris and I
form a {\fg} to represent the failure mode behaviour of the non-inverting amplifier.
%
%We have the failure modes of the {\dc} for the potential divider,
%so we do not need to go back and consider the individual resistor failure modes that defined its behaviour.
@ -742,7 +754,8 @@ form a {\fg} to represent the non-inverting amplifier.
%We can now create a {\fg} for the non-inverting amplifier
%by bringing together the failure modes from \textbf{opamp} and \textbf{PD}.
%
The two components in this new {\fg} have failure modes.
The two components in this new {\fg}, the op-amp and the {\dc} {\em PD} have failure modes, which we use
as {\fcs} in table~\ref{tbl:ampfmea1}.
%Each of these failure modes will be given a {\fc} for analysis,
%and this is represented in table \ref{tbl:ampfmea1}.
% CUNTS NOW I CANNOT USE THE TERM FAILURE SCENARIO---was first column of table below
@ -758,28 +771,31 @@ The two components in this new {\fg} have failure modes.
%%childrens version
%\textbf{Failure} & \textbf{Amplifier} & \textbf{Derived component} \\ %Symptom} \\
% \textbf{Scenario} & \textbf{Effect} & \textbf{Failure Modes} \\ %Description} \\
%%
\textbf{Fault} & \textbf{Amplifier} & \textbf{Derived component} \\ %Symptom} \\
\textbf{Mode} & \textbf{Effect} & \textbf{Failure Modes} \\ %Description} \\
%%FFor
%%% Undrar jag om fittan ska avstand mot failure fucking cause
%
\textbf{Failure} & \textbf{Amplifier} & \textbf{Derived component} \\ %Symptom} \\
\textbf{Cause} & \textbf{Effect} & \textbf{Failure Mode} \\ %Description} \\
% R & wire & res + & res - & description
\hline
\hline
FS1: $OPAMP$ & Output & AMPHigh \\
FC1: $OPAMP$ & Output & AMPHigh \\
LatchUP & High & \\ \hline
FS2: $OPAMP$ & Output Low& AMPLow \\
FC2: $OPAMP$ & Output Low& AMPLow \\
LatchDown & Low gain & \\ \hline
FS3: $OPAMP$ & Output Low & AMPLow \\
FC3: $OPAMP$ & Output Low & AMPLow \\
No Operation & & \\ \hline
FS4: $OPAMP$ & Low pass & LowPass \\
FC4: $OPAMP$ & Low pass & LowPass \\
Low Slew & filtering & \\ \hline
FS5: {\em PD} & Output High & AMPHigh \\
FC5: {\em PD} & Output High & AMPHigh \\
LowPD & & \\ \hline
FS6: {\em PD} & Output Low & AMPLow \\
FC6: {\em PD} & Output Low & AMPLow \\
HighPD & Low Gain & \\ \hline
%TC7: $R_2$ OPEN & LOW & & LowPD \\ \hline
\hline
@ -1090,7 +1106,7 @@ defines a `part' thus
%
This definition of a `part' is useful, but consider parts, such as quad packaged op-amps:
%
in this case, we have four op-amps on one chip. For FMEA we would consider each op-amp in the package
in this case, we have four op-amps on one chip. Using traditional FMEA methods~\cite{sccs}[p.34] we would consider each op-amp in the package
as a separate building block for a circuit. For FMMD each of these four op-amps
in the chip would be considered to be a separate {\bc}.
% CAN WE FIND SUPPORT FOR THIS IN LITERATURE???

7
submission_thesis/style.tex
View File

@ -18,9 +18,10 @@
\usepackage{lastpage}
\usetikzlibrary{shapes,snakes}
\newcommand{\tickYES}{\checkmark}
\newcommand{\fc}{fault~scenario}
\newcommand{\fcs}{fault~scenarios}
%% FUCKING CUNTS \newcommand{\fc}{fault~scenario}
\newcommand{\fc}{fault~cause}
%% FUCKING CUNTS \newcommand{\fcs}{fault~scenarios}
\newcommand{\fcs}{fault~causes}
% Page layout definitions to suit A4 paper
\setcounter{secnumdepth}{3} \setcounter{tocdepth}{4}
\setlength{\topmargin}{0mm}