typos and a rough draft of the conclusion

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Robin P. Clark 2015-03-24 09:11:19 +00:00
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@ -1490,59 +1490,22 @@ and ram complement checking can be applied.
\section{Conclusion} \section{Conclusion}
This paper has picked a very simple example (the industry standard {\ft} Effeciency --- the $O(N^2)$ has been broken down by making it
input circuit and software) several much easier to deal with $O(n^2)$ analyis stages.
to demonstrate
SFMEA and HFMEA methodologies used to describe a failure mode model.
Even a modest system would be far too large to analyse in conference paper
and this
The {\dc} representing the {\ft} reader While there are no FMEA metrics to compare a sw hw hybrid
shows that by taking a using FMMD an estimate of the work to perform, the reasoning distance, can be calculated.
modular approach for FMEA, i.e. FMMD, we can integrate
Our model is described by four FMEA reports; and these % we can model the failure mode behaviour from
model the system from several failure mode perspectives.
With traditional FMEA methods the reasoning~distance is large, because
it stretches from the component failure mode to the top---or---system level failure.
With these four analysis reports
we do not have stages along the `reasoning~path' linking the failure modes from the
electronics to those in the software.
Software is often written `defensively' but t
Each {\fg} to {\dc} transition represents a
reasoning stage.
For this reason applying traditional FMEA to software stretches hw sw interface is handled naturally. Any hw failures
the reasoning distance even further. can now no longer be missed or forgotten in the analysis process.
The sw faces no suprise hw errors that it has no sensible
way of dealing with.
In fact many these reasoning paths overlap---or even by-pass one another--- Errors introduced by the uP are unresolved in this example. But they are listed.
it is very difficult to gauge cause and effect.
For instance, hardware failures are not analysed in the context of how they will
be handled (or missed) by the software.
System outputs commanded from software may not take into account particular
hardware limitations etc.
The interface FMEA does serve to provide a useful
check-list to ensure data and synchronisation conventions used by the hardware
and software are not mismatched. However, the fact it is perceived as required
highlights the the miss-matches possible between the two types of analysis
which could run deeper than the mere interface level.
However, while these techniques ensure that the software and hardware is Re-useability --- the electronics --- the Pt100 --- s/w functions to read ADC values
viewed and analysed from several perspectives, it cannot be termed a homogeneous
failure mode model.
For instance
were the ADC to have a small value error, say adding
a small percentage onto the value, we would be unable to
detect this under the analysis conditions for this model, or
be able to pinpoint it.
Need wishlist ticks and solved problems here.
{ {
\footnotesize \footnotesize

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