From 31521372c6d3d6b08932bb1f6a3fce8b96456b6e Mon Sep 17 00:00:00 2001 From: Robin Clark Date: Wed, 19 Jun 2013 20:29:35 +0100 Subject: [PATCH] JMC PR --- submission_thesis/CH5_Examples/copy.tex | 32 +++++++++++-------- .../CH6_Software_Examples/software.tex | 18 ++++++----- 2 files changed, 28 insertions(+), 22 deletions(-) diff --git a/submission_thesis/CH5_Examples/copy.tex b/submission_thesis/CH5_Examples/copy.tex index 832dfc7..364c54e 100644 --- a/submission_thesis/CH5_Examples/copy.tex +++ b/submission_thesis/CH5_Examples/copy.tex @@ -569,7 +569,7 @@ Both analysis strategies obtained the same failure modes for the inverting amplifier (i.e. the same failure modes for the {\dc} INVAMP). \subsection{Conclusion} -All FMEA is performed in the context of the environment and functionality of the enitity +All FMEA is performed in the context of the environment and functionality of the entity under analysis. This example shows that for the condition where the input voltage is constrained to being positive, we can apply two levels of decomposition. @@ -914,7 +914,7 @@ to periodically switch in test signals in place of the input signal. \subsection{Conclusion} -This example shows a three stages hierarchy, and a graph tracing the base~component failure modes to the +This example shows three stages of hierarchy, and a graph tracing the base~component failure modes to the top level event. It also re-visits the decisions about membership of {\fgs}, due to the context of the circuit raised in section~\ref{subsec:invamp2}. % @@ -1543,7 +1543,7 @@ A finer grained approach produces more potentially re-usable {\dcs} and involves several stages with lower reasoning distances. The lower reasoning distances, or complexity comparision figures are given in the metrics chapter~\ref{sec:chap7} at section~\ref{sec:bubbaCC}. -This show that the finer grained models also benefit from lower reasoning distances for the failure mode model. +These show that the finer grained models also benefit from lower reasoning distances for the failure mode model. \clearpage @@ -1874,8 +1874,8 @@ We now show the final {\dc} hierarchy in figure~\ref{fig:eulersdfinal}. % The output from the DQ is sent to the digital comparator formed by R3,R4 % and IC3. % The output from this is sent to the summing integrator as the signal summed with the input. -\subsection{conclusion} -The \sd example, shows that FMMD can be applied to mixed digital and analogue circuitry. +\subsection{Conclusion} +The {\sd} example, shows that FMMD can be applied to mixed digital and analogue circuitry. %\clearpage @@ -1897,7 +1897,11 @@ The \sd example, shows that FMMD can be applied to mixed digital and analogue ci %% STATS MOVED TO FUTURE WORK %% For this example we look at an industry standard temperature measurement circuit, -the Pt100. The four wire Pt100 configuration is a commonly used and well known safety critical circuit. +the `four~wire~Pt100'. +% +The four wire Pt100 configuration is a commonly used +and is a well known safety critical circuit. +% Applying FMMD lets us look at this circuit in a fresh light. We analyse this for both single and double failures, in addition it demonstrates FMMD coping with component parameter tolerances. @@ -1964,9 +1968,9 @@ look-up tables or a suitable polynomial expression. \end{figure} % % -The voltage ranges we expect from this three stage potential divider\footnote{ -two stages are required for validation, a third stage is used to measure the current flowing -through the circuit to obtain accurate temperature readings} +The voltage ranges we expect from this three stage potential divider\footnote{Two stages are required +for validation, a third stage is used to measure the current flowing +through the circuit to obtain accurate temperature readings.} are shown in figure \ref{fig:Pt100vrange}. Note that there is an expected range for each reading, for a given temperature span. Note that the low reading goes down as temperature increases, and the higher reading goes up. @@ -2094,17 +2098,17 @@ The Pt100 element is a precision part and will be chosen for a specified accurac One or other of the load resistors (the one we measure current over) should also be of this accuracy. -The \ohms{2k2} loading resistors may be ordinary, in that they would have a good temperature co-effecient +The \ohms{2k2} loading resistors may be ordinary, in that they would have a good temperature co-efficient (typically $\leq \; 50(ppm)\Delta R \propto \Delta \oc $), and should be subjected to a narrow temperature range anyway, being mounted on a PCB. %\glossary{{PCB}{Printed Circuit Board}} To calculate the resistance of the Pt100 element % (and thus derive its temperature), having the voltage over it, we now need the current. -Lets use, for the sake of example $R_2$ to measure the current flowing in the temperature sensor loop. -As the voltage over $R_3$ is relative (a design feature to eliminate resistance effects of the cables). -We can calculate the current by reading +Lets use, for the sake of example, $R_2$ to measure the current flowing in the temperature sensor loop. +As the voltage over $R_3$ is relative (a design feature to eliminate resistance effects of the cables), +we can calculate the current by reading the voltage over the known resistor $R2$.\footnote{To calculate the resistance of the Pt100 we need the current flowing though it. -We can determine this via ohms law applied to $R_2$, $V=IR$, $I=\frac{V}{R_2}$, +We can determine this via Ohms law applied to $R_2$, $V=IR$, $I=\frac{V}{R_2}$, and then using $I$, we can calculate $R_{3} = \frac{V_{R3}}{I}$.} As these calculations are performed by ohms law, which is linear, the accuracy of the reading will be determined by the accuracy of $R_2$ and $R_{3}$. diff --git a/submission_thesis/CH6_Software_Examples/software.tex b/submission_thesis/CH6_Software_Examples/software.tex index 57662c9..f93ef41 100644 --- a/submission_thesis/CH6_Software_Examples/software.tex +++ b/submission_thesis/CH6_Software_Examples/software.tex @@ -254,8 +254,9 @@ a per~mil representation of the {\ft} input current. % For the purpose of example the `C' programming language~\cite{DBLP:books/ph/KernighanR88} is used. % -A 'C' function function is declared with parenthesis to +A 'C' function is declared with parenthesis to differentiate from other type of variables (data types or pointers). +% In this document we borrow that format, hence the C~language function called `main' will be presented as \cf{main}. % @@ -895,7 +896,7 @@ We list these, and begin, from the bottom-up, to apply FMMD analysis. \subsection{FMMD Analysis of PID temperature Controller} To summarise from the design stage, -Identified electronic components: +the electronic components identified thus far: \begin{itemize} \item ADCMUX --- Electronics, analysed in previous example. \item TIMER --- Internal micro controller timer @@ -955,8 +956,9 @@ $$ fm(PWM) = \{ HIGH, LOW \}.$$ The Micro controller is a complex piece of highly integrated electronics. At a minimum it would include a micro-processor with PROM and RAM -general I/O lines ane external interupt lines. -Typically therer are many other I/O module incorporated (e.g. TIMERS, UARTS, PWM, ADC, ADCMUX, CAN). +general I/O and external interrupt lines. +% +Typically there are many other I/O modules incorporated (e.g. TIMERS, UARTS, PWM, ADC, ADCMUX, CAN). In this project we are using the ADCMUX, TIMER, PWM and general purpose computing facilities. We have to therefore consider the general~computing, CLOCK, PROM and RAM failure modes. $$fm (micro-controller) =\{ PROM\_FAULT, RAM\_FAULT, CPU\_FAULT, ALU\_FAULT, CLOCK\_STOPPED \}.$$ @@ -965,7 +967,7 @@ $$fm (micro-controller) =\{ PROM\_FAULT, RAM\_FAULT, CPU\_FAULT, ALU\_FAULT, CLO Identified Software Components: \begin{itemize} \item --- \cf{Monitor} (which calls PID algorithm and sets status LEDS) - \item --- \cf{PID} (which calls cf{determine\_set\_point\_error} and \cf{output\_control}) + \item --- \cf{PID} (which calls \cf{determine\_set\_point\_error} and \cf{output\_control}) \item --- \cf{determine\_set\_point\_error} (which calls convert\_ADC\_to\_T) \item --- \cf{convert\_ADC\_to\_T} (which calls read\_ADC which we can re-use from the last example) \item --- \cf{read\_ADC} @@ -1027,7 +1029,7 @@ and the function \cf{determine\_set\_point\_error}. The pre-condition for \cf{determine\_set\_point\_error} is that the temperature read by it is accurate, and its post condition is to return the correct control error value. Most failure modes from a Pt100 are observable. -we can divide the post condition into two variants, a known incorrect error value, KnownIncorrectErrorValue +We can divide the post condition into two variants, a known incorrect error value, KnownIncorrectErrorValue where we can detect the Pt100 value is suspect, and IncorrectErrorValue where we simply have an incorrect error value. This analysis is presented in table~\ref{tbl:geterror}. @@ -1122,7 +1124,7 @@ $$fm(HeaterOutput) = \{ HeaterOnFull, HeaterOff, HeaterOutputIncorrect \}$$ The status LEDS will be controlled by general purpose (GPIO) I/O pins. % -We could have say, three LEDS one flashing with a human readable mark +We could have, three LEDS, one flashing with a human readable mark space ratio representing the heater output, one flashing at a regular interval to indicate the processor is alive and another flashing at an interval related to the temperature, (to indicate if the temperature readings are within expected ranges). @@ -1147,7 +1149,7 @@ We apply FMMD analysis to this {\fg} in table~\ref{tbl:ledoutput}. \centering \includegraphics[width=300pt]{./CH5_Examples/euler_led_output.png} % euler_heater_output.png: 392x141 pixel, 72dpi, 13.83x4.97 cm, bb=0 0 392 141 - \caption{Euler diagram showing LEDOutput with its three LEDs and GPIO hardware elements, and its + \caption{Euler diagram showing LEDOutput with its three LEDs and GPIO hardware elements, and its software component setLEDS.} \label{fig:eulerheateroutput} \end{figure}