chris noticed erro in first c5 example. gone trhough this carefully. he made an error too
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@ -84,6 +84,7 @@ However,
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$PD$ cannot be directly re-used, and not just because
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$PD$ cannot be directly re-used, and not just because
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the potential divider is floating i.e. that the polarity of
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the potential divider is floating i.e. that the polarity of
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the R2 side of the potential divider is determined by the output from the op-amp.
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the R2 side of the potential divider is determined by the output from the op-amp.
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\fmmdglossOPAMP
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\fmmdglossOPAMP
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The circuit schematic stipulates that the input is positive.
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The circuit schematic stipulates that the input is positive.
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@ -101,18 +102,25 @@ and analysed as such; see table~\ref{tbl:pdneg}.
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A valid range for the output value of this circuit is assumed.
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A valid range for the output value of this circuit is assumed.
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Thus negative or low voltages can be considered as LOW
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%Thus negative or low voltages can be considered as LOW
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and voltages higher than a given threshold considered as HIGH.
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%and voltages higher than a given threshold considered as HIGH.
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%
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Because the amplifier inverts and the input is guaranteed positive any
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output voltage above or equal to zero would be erroneous.
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This would be an $AMP_{HIGH}$ failure symptom.
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A threshold would be determined for an $AMP_{LOW}$ failure symptom (i.e. the output voltage more negative than expected). % error given the expected input range.
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\begin{table}[h+]
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\begin{table}[h+]
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\caption{Inverted Potential divider: Single failure analysis}
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\caption{Inverted Potential divider: Single failure analysis}
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\begin{tabular}{|| l | l | c | c | l ||} \hline
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\begin{tabular}{|| l | l | c | c | l ||} \hline
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\textbf{Failure Cause} & & \textbf{Inverted Pot Div Effect} & & \textbf{Symptom} \\
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\textbf{Failure Cause} & & \textbf{Inverted Pot Divider, $IPD$, Effect} & & \textbf{Symptom} \\
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\hline
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\hline
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FC1: R1 SHORT & & $HIGH$ & & $PDHigh$ \\ \hline
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FC1: R1 SHORT & & $HIGH$ & & $IPDHigh$ \\ \hline
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FC2: R1 OPEN & & $LOW$ & & $PDLow$ \\ \hline
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FC2: R1 OPEN & & $LOW$ & & $IPDLow$ \\ \hline
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FC3: R2 SHORT & & $LOW$ & & $PDLow$ \\ \hline
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FC3: R2 SHORT & & $LOW$ & & $IPDLow$ \\ \hline
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FC4: R2 OPEN & & $HIGH$ & & $PDHigh$ \\ \hline
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FC4: R2 OPEN & & $HIGH$ & & $IPDHigh$ \\ \hline
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\hline
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\hline
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\end{tabular}
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\end{tabular}
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\label{tbl:pdneg}
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\label{tbl:pdneg}
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@ -145,8 +153,8 @@ and voltages higher than a given threshold considered as HIGH.
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% Potential divider failure modes
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% Potential divider failure modes
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%
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%
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\node[symptom] (PDHIGH) at (\layersep*2,-0.7) {$PD_{HIGH}$};
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\node[symptom] (PDHIGH) at (\layersep*2,-0.5) {$IPD_{HIGH}$};
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\node[symptom] (PDLOW) at (\layersep*2,-2.2) {$PD_{LOW}$};
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\node[symptom] (PDLOW) at (\layersep*2,-2.4) {$IPD_{LOW}$};
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\path (R1OPEN) edge (PDLOW);
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\path (R1OPEN) edge (PDLOW);
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\path (R2SHORT) edge (PDLOW);
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\path (R2SHORT) edge (PDLOW);
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@ -156,16 +164,16 @@ and voltages higher than a given threshold considered as HIGH.
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\end{tikzpicture}
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\end{tikzpicture}
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%
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%
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\caption{Failure symptoms of the `Inverted Potential Divider' $INVPD$}
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\caption{Failure symptoms of the `Inverted Potential Divider' $IPD$}
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\label{fig:pdneg}
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\label{fig:pdneg}
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\end{figure}
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\end{figure}
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A {\dc} can be formed from the analysis results in table~\ref{tbl:pdneg} %this,
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A {\dc} can be formed from the analysis results in table~\ref{tbl:pdneg} %this,
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and called an inverted potential divider $INVPD$.
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and called an inverted potential divider ($IPD$).
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%
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%
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The final stage of analysis for this amplifier, is made by
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The final stage of analysis for this amplifier, is made by
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by forming a {\fg} with the OpAmp and our new {\dc} $INVPD$.
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by forming a {\fg} with the OpAmp and the new {\dc} $IPD$.
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%
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%
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\begin{table}[h+]
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\begin{table}[h+]
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\caption{Inverting Amplifier: Single failure analysis using the $PD$ {\dc}}
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\caption{Inverting Amplifier: Single failure analysis using the $PD$ {\dc}}
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@ -175,8 +183,8 @@ by forming a {\fg} with the OpAmp and our new {\dc} $INVPD$.
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\textbf{cause} & & \textbf{ } & & \textbf{Failure Mode} \\
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\textbf{cause} & & \textbf{ } & & \textbf{Failure Mode} \\
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\hline
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\hline
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FC1: INVPD LOW & & NEGATIVE on -input & & $ HIGH $ \\
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FC1: IPD LOW & & Negative on -input & & $ HIGH $ \\
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FC2: INVPD HIGH & & Positive on -input & & $ LOW $ \\ \hline
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FC2: IPD HIGH & & Positive on -input & & $ LOW $ \\ \hline
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FC5: AMP L\_DN & & $ INVAMP_{low} $ & & $ LOW $ \\
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FC5: AMP L\_DN & & $ INVAMP_{low} $ & & $ LOW $ \\
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@ -256,8 +264,8 @@ by forming a {\fg} with the OpAmp and our new {\dc} $INVPD$.
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% Potential divider failure modes
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% Potential divider failure modes
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%
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%
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\node[symptom] (PDHIGH) at (\layersep*2,-6) {$PD_{HIGH}$};
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\node[symptom] (PDHIGH) at (\layersep*2,-5.8) {$IPD_{HIGH}$};
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\node[symptom] (PDLOW) at (\layersep*2,-7.6) {$PD_{LOW}$};
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\node[symptom] (PDLOW) at (\layersep*2,-8.1) {$IPD_{LOW}$};
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@ -270,9 +278,9 @@ by forming a {\fg} with the OpAmp and our new {\dc} $INVPD$.
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\node[symptom] (AMPHIGH) at (\layersep*3.4,-3) {$AMP_{HIGH}$};
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\node[symptom] (AMPHIGH) at (\layersep*4.4,-3) {$AMP_{HIGH}$};
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\node[symptom] (AMPLOW) at (\layersep*3.4,-5) {$AMP_{LOW}$};
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\node[symptom] (AMPLOW) at (\layersep*4.4,-5) {$AMP_{LOW}$};
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\node[symptom] (AMPLP) at (\layersep*3.4,-7) {$LOWPASS$};
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\node[symptom] (AMPLP) at (\layersep*4.4,-7) {$LOWPASS$};
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\path (PDLOW) edge (AMPHIGH);
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\path (PDLOW) edge (AMPHIGH);
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\path (OPAMPLU) edge (AMPHIGH);
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\path (OPAMPLU) edge (AMPHIGH);
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@ -299,8 +307,7 @@ Failure modes for the {\dc} $INVAMP$ can be expressed thus;
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A DAG is drawn representing the failure mode behaviour of
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A DAG is drawn representing the failure mode behaviour of
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this amplifier (see figure~\ref{fig:invdag1}).
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this amplifier (see figure~\ref{fig:invdag1}).
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%
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%
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Note that this allows us
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Note that this allows failure symptoms to be traced back to causes, i.e.
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to trace failure symptoms back to causes, i.e.
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to traverse from system level or top failure modes to base component failure modes.
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to traverse from system level or top failure modes to base component failure modes.
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%%%%% 12DEC 2012 UP to here in notes from AF email.
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%%%%% 12DEC 2012 UP to here in notes from AF email.
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%
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%
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@ -310,10 +317,12 @@ to traverse from system level or top failure modes to base component failure mod
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\label{subsec:invamp2}
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\label{subsec:invamp2}
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%
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The problem above is analysed without using an intermediate $INVPD$
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The problem above is analysed without using an intermediate $IPD$
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derived component.
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derived component.
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%
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%
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If the input voltage was not constrained to being positive this one stage analysis would be necessary.
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If the input voltage was not constrained to being positive this one stage analysis would be necessary.
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%
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%
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This concern is re-visited in the differencing amplifier example in the next section.
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This concern is re-visited in the differencing amplifier example in the next section.
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%We can view the failure mode mode produced with FMMD as a DAG
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%We can view the failure mode mode produced with FMMD as a DAG
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%in figure~\ref{fig:
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%in figure~\ref{fig:
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@ -336,13 +345,13 @@ This concern is re-visited in the differencing amplifier example in the next sec
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\textbf{cause} & & \textbf{ } & & \textbf{Failure Mode} \\
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\textbf{cause} & & \textbf{ } & & \textbf{Failure Mode} \\
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\hline
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\hline
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FS1: R1 SHORT & & NEGATIVE out of range & & $ HIGH $ \\
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FS1: R1 SHORT & & -ve in high gain & & $ LOW $ \\
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% FS1: R1 SHORT -ve in & & POSITIVE out of range & & $ OUT OF RANGE $ \\ \hline
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% FS1: R1 SHORT -ve in & & POSITIVE out of range & & $ OUT OF RANGE $ \\ \hline
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FS2: R1 OPEN & & zero output & & $ LOW $ \\ \hline
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FS2: R1 OPEN & & zero volt follower & & $ HIGH $ \\ \hline
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% FS2: R1 OPEN -ve in & & zero output & & $ ZERO OUTPUT $ \\ \hline
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% FS2: R1 OPEN -ve in & & zero output & & $ ZERO OUTPUT $ \\ \hline
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FS3: R2 SHORT & & $INVAMP_{nogain} $ & & $ LOW $ \\
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FS3: R2 SHORT & & $INVAMP_{unitygain} $ & & $ HIGH $ \\
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% FS3: R2 SHORT -ve in & & $INVAMP_{nogain} $ & & $ NO GAIN $ \\ \hline
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% FS3: R2 SHORT -ve in & & $INVAMP_{nogain} $ & & $ NO GAIN $ \\ \hline
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FS4: R2 OPEN & & NEGATIVE out of range $ $ & & $ LOW$ \\ \hline
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FS4: R2 OPEN & & NEGATIVE out of range $ $ & & $ LOW$ \\ \hline
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@ -366,9 +375,9 @@ This concern is re-visited in the differencing amplifier example in the next sec
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The first analysis used two FMMD stages.
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The first analysis used two FMMD stages.
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%
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%
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The first stage analysed an inverted potential divider %, analyses its failure modes,
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The first stage analysed an inverted potential divider %, analyses its failure modes,
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giving the {\dc} (INVPD).
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giving the {\dc} (IPD).
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%
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%
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The next stage analysed a {\fg} comprised of the INVPD and an OpAmp.
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The next stage analysed a {\fg} comprised of the IPD and an OpAmp.
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%
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%
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The second analysis (3 components) looked at the effects of each failure mode of each resistor
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The second analysis (3 components) looked at the effects of each failure mode of each resistor
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and the op-amp. % circuit.
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and the op-amp. % circuit.
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@ -1338,7 +1347,7 @@ This can be the first {\fg} and it is analysed in table~\ref{detail:SUMJINT}: %{
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%
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$$FG = \{R1, R2, IC1, C1 \} .$$
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$$FG = \{R1, R2, IC1, C1 \} .$$
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%
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That is, the failure modes (see FMMD analysis at~\ref{detail:SUMJINT}) of our new {\dc}
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That is, the failure modes (see FMMD analysis at~\ref{detail:SUMJINT}) of the new {\dc}
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$SUMJINT$ are $$\{ V_{in} DOM, V_{fb} DOM, NO\_INTEGRATION, HIGH, LOW \} .$$
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$SUMJINT$ are $$\{ V_{in} DOM, V_{fb} DOM, NO\_INTEGRATION, HIGH, LOW \} .$$
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%
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%
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%\clearpage
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%\clearpage
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