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chris noticed erro in first c5 example. gone trhough this carefully. he made an error too

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Robin P. Clark 2013-09-17 13:28:27 +01:00
parent 082f3a513c
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65
submission_thesis/CH5_Examples/copy.tex
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@ -84,6 +84,7 @@ However,
$PD$ cannot be directly re-used, and not just because
the potential divider is floating i.e. that the polarity of
the R2 side of the potential divider is determined by the output from the op-amp.
%
\fmmdglossOPAMP
%
The circuit schematic stipulates that the input is positive.
@ -101,18 +102,25 @@ and analysed as such; see table~\ref{tbl:pdneg}.
%
A valid range for the output value of this circuit is assumed.
%
Thus negative or low voltages can be considered as LOW
and voltages higher than a given threshold considered as HIGH.
%Thus negative or low voltages can be considered as LOW
%and voltages higher than a given threshold considered as HIGH.
%
Because the amplifier inverts and the input is guaranteed positive any
output voltage above or equal to zero would be erroneous.
%
This would be an $AMP_{HIGH}$ failure symptom.
%
A threshold would be determined for an $AMP_{LOW}$ failure symptom (i.e. the output voltage more negative than expected). % error given the expected input range.
%
\begin{table}[h+]
\caption{Inverted Potential divider: Single failure analysis}
\begin{tabular}{|| l | l | c | c | l ||} \hline
\textbf{Failure Cause} & & \textbf{Inverted Pot Div Effect} & & \textbf{Symptom} \\
\textbf{Failure Cause} & & \textbf{Inverted Pot Divider, $IPD$, Effect} & & \textbf{Symptom} \\
\hline
FC1: R1 SHORT & & $HIGH$ & & $PDHigh$ \\ \hline
FC2: R1 OPEN & & $LOW$ & & $PDLow$ \\ \hline
FC3: R2 SHORT & & $LOW$ & & $PDLow$ \\ \hline
FC4: R2 OPEN & & $HIGH$ & & $PDHigh$ \\ \hline
FC1: R1 SHORT & & $HIGH$ & & $IPDHigh$ \\ \hline
FC2: R1 OPEN & & $LOW$ & & $IPDLow$ \\ \hline
FC3: R2 SHORT & & $LOW$ & & $IPDLow$ \\ \hline
FC4: R2 OPEN & & $HIGH$ & & $IPDHigh$ \\ \hline
\hline
\end{tabular}
\label{tbl:pdneg}
@ -145,8 +153,8 @@ and voltages higher than a given threshold considered as HIGH.
% Potential divider failure modes
%
\node[symptom] (PDHIGH) at (\layersep*2,-0.7) {$PD_{HIGH}$};
\node[symptom] (PDLOW) at (\layersep*2,-2.2) {$PD_{LOW}$};
\node[symptom] (PDHIGH) at (\layersep*2,-0.5) {$IPD_{HIGH}$};
\node[symptom] (PDLOW) at (\layersep*2,-2.4) {$IPD_{LOW}$};
\path (R1OPEN) edge (PDLOW);
\path (R2SHORT) edge (PDLOW);
@ -156,16 +164,16 @@ and voltages higher than a given threshold considered as HIGH.
\end{tikzpicture}
%
\caption{Failure symptoms of the `Inverted Potential Divider' $INVPD$}
\caption{Failure symptoms of the `Inverted Potential Divider' $IPD$}
\label{fig:pdneg}
\end{figure}
%
%
A {\dc} can be formed from the analysis results in table~\ref{tbl:pdneg} %this,
and called an inverted potential divider $INVPD$.
and called an inverted potential divider ($IPD$).
%
The final stage of analysis for this amplifier, is made by
by forming a {\fg} with the OpAmp and our new {\dc} $INVPD$.
by forming a {\fg} with the OpAmp and the new {\dc} $IPD$.
%
\begin{table}[h+]
\caption{Inverting Amplifier: Single failure analysis using the $PD$ {\dc}}
@ -175,8 +183,8 @@ by forming a {\fg} with the OpAmp and our new {\dc} $INVPD$.
\textbf{cause} & & \textbf{ } & & \textbf{Failure Mode} \\
\hline
FC1: INVPD LOW & & NEGATIVE on -input & & $ HIGH $ \\
FC2: INVPD HIGH & & Positive on -input & & $ LOW $ \\ \hline
FC1: IPD LOW & & Negative on -input & & $ HIGH $ \\
FC2: IPD HIGH & & Positive on -input & & $ LOW $ \\ \hline
FC5: AMP L\_DN & & $ INVAMP_{low} $ & & $ LOW $ \\
@ -256,8 +264,8 @@ by forming a {\fg} with the OpAmp and our new {\dc} $INVPD$.
% Potential divider failure modes
%
\node[symptom] (PDHIGH) at (\layersep*2,-6) {$PD_{HIGH}$};
\node[symptom] (PDLOW) at (\layersep*2,-7.6) {$PD_{LOW}$};
\node[symptom] (PDHIGH) at (\layersep*2,-5.8) {$IPD_{HIGH}$};
\node[symptom] (PDLOW) at (\layersep*2,-8.1) {$IPD_{LOW}$};
@ -270,9 +278,9 @@ by forming a {\fg} with the OpAmp and our new {\dc} $INVPD$.
\node[symptom] (AMPHIGH) at (\layersep*3.4,-3) {$AMP_{HIGH}$};
\node[symptom] (AMPLOW) at (\layersep*3.4,-5) {$AMP_{LOW}$};
\node[symptom] (AMPLP) at (\layersep*3.4,-7) {$LOWPASS$};
\node[symptom] (AMPHIGH) at (\layersep*4.4,-3) {$AMP_{HIGH}$};
\node[symptom] (AMPLOW) at (\layersep*4.4,-5) {$AMP_{LOW}$};
\node[symptom] (AMPLP) at (\layersep*4.4,-7) {$LOWPASS$};
\path (PDLOW) edge (AMPHIGH);
\path (OPAMPLU) edge (AMPHIGH);
@ -299,8 +307,7 @@ Failure modes for the {\dc} $INVAMP$ can be expressed thus;
A DAG is drawn representing the failure mode behaviour of
this amplifier (see figure~\ref{fig:invdag1}).
%
Note that this allows us
to trace failure symptoms back to causes, i.e.
Note that this allows failure symptoms to be traced back to causes, i.e.
to traverse from system level or top failure modes to base component failure modes.
%%%%% 12DEC 2012 UP to here in notes from AF email.
%
@ -310,10 +317,12 @@ to traverse from system level or top failure modes to base component failure mod
\label{subsec:invamp2}
%
The problem above is analysed without using an intermediate $INVPD$
The problem above is analysed without using an intermediate $IPD$
derived component.
%
If the input voltage was not constrained to being positive this one stage analysis would be necessary.
%
%
This concern is re-visited in the differencing amplifier example in the next section.
%We can view the failure mode mode produced with FMMD as a DAG
%in figure~\ref{fig:
@ -336,13 +345,13 @@ This concern is re-visited in the differencing amplifier example in the next sec
\textbf{cause} & & \textbf{ } & & \textbf{Failure Mode} \\
\hline
FS1: R1 SHORT & & NEGATIVE out of range & & $ HIGH $ \\
FS1: R1 SHORT & & -ve in high gain & & $ LOW $ \\
% FS1: R1 SHORT -ve in & & POSITIVE out of range & & $ OUT OF RANGE $ \\ \hline
FS2: R1 OPEN & & zero output & & $ LOW $ \\ \hline
FS2: R1 OPEN & & zero volt follower & & $ HIGH $ \\ \hline
% FS2: R1 OPEN -ve in & & zero output & & $ ZERO OUTPUT $ \\ \hline
FS3: R2 SHORT & & $INVAMP_{nogain} $ & & $ LOW $ \\
FS3: R2 SHORT & & $INVAMP_{unitygain} $ & & $ HIGH $ \\
% FS3: R2 SHORT -ve in & & $INVAMP_{nogain} $ & & $ NO GAIN $ \\ \hline
FS4: R2 OPEN & & NEGATIVE out of range $ $ & & $ LOW$ \\ \hline
@ -366,9 +375,9 @@ This concern is re-visited in the differencing amplifier example in the next sec
The first analysis used two FMMD stages.
%
The first stage analysed an inverted potential divider %, analyses its failure modes,
giving the {\dc} (INVPD).
giving the {\dc} (IPD).
%
The next stage analysed a {\fg} comprised of the INVPD and an OpAmp.
The next stage analysed a {\fg} comprised of the IPD and an OpAmp.
%
The second analysis (3 components) looked at the effects of each failure mode of each resistor
and the op-amp. % circuit.
@ -1338,7 +1347,7 @@ This can be the first {\fg} and it is analysed in table~\ref{detail:SUMJINT}: %{
%
$$FG = \{R1, R2, IC1, C1 \} .$$
%
That is, the failure modes (see FMMD analysis at~\ref{detail:SUMJINT}) of our new {\dc}
That is, the failure modes (see FMMD analysis at~\ref{detail:SUMJINT}) of the new {\dc}
$SUMJINT$ are $$\{ V_{in} DOM, V_{fb} DOM, NO\_INTEGRATION, HIGH, LOW \} .$$
%
%\clearpage