tidied b4 sending to chris garret

Has conditional compilation for pld and dag versions
set in paper.tex now.

noninvopamp/noninvopamp.tex

@@ -224,10 +224,10 @@ gives an output high voltage reading. We can now consider the {\fg}
 as a component in its own right, and its symptoms as its failure modes.
 
 From table  \ref{pdfmea} we can see that resistor 
-failures modes lead to common symptoms.
-By drawing connecting lines in the graph
-we can represent them.
-The {\fg} can now be considered a derived component.
+failures modes lead to some common `symptoms'.
+By drawing connecting lines in a graph, from the failure modes to the symptoms
+we can show the relationships between the component failure modes and resultant symptoms.
+%The {\fg} can now be considered a derived component.
 This is represented in the DAG in figure \ref{fig:fg1adag}.
 
 \begin{figure}[h+]
@@ -333,7 +333,7 @@ We can use the symbol $\bowtie$ to represent taking the analysed
 We can now represent the potential divider as a {\dc}.
 Because have its symptoms or failure mode behaviour,
 we can treat these as the failure modes of a a new {\dc}.
-We can represent it now as a DAG (see \ref{fig:dc1dag}).
+We can represent that as a DAG (see figure \ref{fig:dc1dag}).
 
 \begin{figure}[h+]
  \centering
@@ -429,11 +429,10 @@ We can represent these failure modes on a DAG (see figure~\ref{fig:op1dag}).
 We can now consider bringing the OP amp and the potential divider together to
 model the non inverting amplifier. We have the failure modes of the functional group for the potential divider, 
 so we do not need to consider the individual resistor failure modes that define its behaviour.
-We can make a new functional group to represent the amplifier, by bringing the component \textbf{opamp}
-and the component potential divider \textbf{PD} into a new functional group.
-
 \ifthenelse {\boolean{pld}}
 {
+We can make a new functional group to represent the amplifier, by bringing the component \textbf{opamp}
+and the component potential divider \textbf{PD} into a new functional group.
 This functional group has the failure modes from the op-amp component, and the failure modes
 from the potential divider {\dc}, represented by figure~\ref{fig:fgamp}.
 
@@ -462,7 +461,7 @@ regions) see figure~\ref{fig:fgampa}.
 
 \ifthenelse {\boolean{dag}}
 {
-We can now represent the {\fg} for the non-inverting amplifier
+We can now crate a  {\fg} for the non-inverting amplifier
 by bringing together the failure modes from \textbf{opamp} and \textbf{PD}.
 Each of these failure modes will be given a test case for analysis,
 and this is represented in table \ref{ampfmea}.
@@ -520,6 +519,14 @@ We can now derive a `component' to represent this amplifier configuration (see f
 \ifthenelse {\boolean{dag}}
 {
 
+%% text for figure below
+
+The non-inverting amplifier can be drawn as a DAG using the 
+results from table~\ref{ampfmea} (see~figure~\ref{fig:noninvdag0}).
+Note that the potential divider, $PD$, is treated as a component with a set of failure modes,
+and its error sources and analysis have been hidden in this diagram.
+$PD$ is considered to be a {\dc}.
+
 \begin{figure}
  \centering
  \begin{tikzpicture}[shorten >=1pt,->,draw=black!50, node distance=\layersep]
@@ -574,7 +581,7 @@ We can now derive a `component' to represent this amplifier configuration (see f
 \section{Failure Modes from non inverting amplifier as a Directed Acyclic Graph (DAG)}
 \ifthenelse {\boolean{pld}}
 {
-We can now represent the FMMD analysis as a directed graph, see figure \ref{fig:noninvdag0}.
+We can now represent the FMMD analysis as a directed graph, see figure \ref{fig:noninvdag1}.
 With the information structured in this way, we can trace the high level failure mode symptoms 
 back to their potential causes.
 }
@@ -586,7 +593,7 @@ back to their potential causes.
 We can now expand the $PD$ {\dc} and now have a full FMMD failure mode model
 drawn as a DAG, which we can use to traverse to determine the possible causes to
 the three high level symptoms, or failure~modes of the non-inverting amplifier.
-Figure \ref{fig:noninvdag0} shows a fully expanded DAG, from which we can derive information
+Figure \ref{fig:noninvdag1} shows a fully expanded DAG, from which we can derive information
 to assist in building models for FTA, FMEA, FMECA and FMEDA failure mode analysis methodologies.
 }
 {
@@ -711,7 +718,7 @@ to assist in building models for FTA, FMEA, FMECA and FMEDA failure mode analysi
  \end{tikzpicture}
  % End of code
  \caption{Full DAG representing failure modes and symptoms of the Non Inverting Op-amp Circuit}
- \label{fig:noninvdag0}
+ \label{fig:noninvdag1}
  \end{figure}
 
 
@@ -722,19 +729,19 @@ to assist in building models for FTA, FMEA, FMECA and FMEDA failure mode analysi
 
 We can derive an FTA~\cite{nucfta}~\cite{nasafta} diagram for a top level event, by tracing back through the DAG.
 Where we come to a node with more than one error source, this becomes an `xor' gate
-in the FTA diagram. Tracing back from the top level event $AMP Low$ we are lead to
-the $OPAMP latch down$ and $OP amp Noop$. These two events  can cause the symptom $AMP Low$.
-We can also trace back down to the symptom $PD High$. Thus we have three
-possible cause for $AMP LOW$, and so we can draw a three input
-`xor' gate below $AMP Low$, to which $OPAMP latch down$, $OP amp Noop$ and $PD High$ 
-connect to from below\footnote{XOR is used here, because we are considering single failures only.
-This is a weakness in FTA diagrams, as it is clumsy to represent 
-conjunction and dis-junction sourced from the same failure modes}.
-$OPAMP latch down$ and $OP amp Noop$ are base level or component events, and so we cannot
+in the FTA diagram. Tracing back from the top level event $AMP_{low}$ we are lead to
+the $OPAMP_{latchdown}$ and $OPAMP_{noop}$. These two events  can cause the symptom $AMP_{low}$.
+We can also trace back down to the symptom $PD_{high}$. Thus we have three
+possible cause for $AMP_{low}$, and so we can draw a three input
+`xor' gate below $AMP_{low}$, to which $OPAMP_{latchdown}$, $OPAMP_{noop}$ and $PD_{high}$ 
+connect to from below\footnote{XOR is used here, because we have analysed for single failures only.}
+%This is a weakness in FTA diagrams, as it is clumsy to represent 
+%conjunction and dis-junction sourced from the same failure modes}.
+$OPAMP_{latchdown}$ and $OPAMP_{noop}$ are base level or component events, and so we cannot
 trace them down any further.
-$PD High$ is a symptom, and can be traced further.
-$PD High$ can ocurr  by either event $R1_{open}$ or $R2_{short}$.
-We can place an or gate below $PD High$ and connect the events $R1_{open}$ or $R2_{short}$
+$PD_{high}$ is a symptom, and can be traced further.
+$PD_{high}$ can occur  by either event $R1_{open}$ or $R2_{short}$.
+We can place an xor gate below $PD_{high}$ and connect the events $R1_{open}$ or $R2_{short}$
 to it.
 The FTA diagram directly derived from the FMMD DAG is shown in figure \ref{fig:noninvfta}.
 
@@ -827,31 +834,33 @@ The FTA diagram directly derived from the FMMD DAG is shown in figure \ref{fig:n
 \end{figure}
  
 
-\subsection{The FTA `or' trap}
-The example above highlighs a weakness in the FTA methodology.
-Intuitively, the $AMP_{low}$ failure symptom, has three possible
-causes and it would be tempting drawing an FTA diagram
-to use a triple input  `or' gate to model these.
+\subsection{The FTA `OR' trap}
 
-An `or' gate would mean that the powerset of all its inputs
+This example amplifier analysis highlights a weakness in the FTA methodology.
+Intuitively, the $AMP_{low}$ failure symptom, has three possible
+causes and it would be tempting, when drawing an FTA diagram \footnote{FTA diagrams are drawn from the top down,
+ starting with high level undesirable events~\cite{nucfta}}, 
+to use a triple input `OR' gate to model these.
+
+An `OR' gate would mean that the power-set of all its inputs
 leads to the resultant failure mode/symptom.
 
- 
-In this case we have a combination that breaks this rule. Were the condition 
+In this example we have a combination that breaks this rule. Were the condition 
 $$PD_{high} \wedge OPAMP_{noop}$$ to be true we would have a floating output
 which is a different error condition to the output being actively low.
 
 This means that anyone drawing an OR gate in an FTA diagram
-should either specifiy that only single failure modes are considered
-possible, or, must consider all powerset combinations of the inputs.
+should either specify that only single failure modes have been considered
+possible, or, must consider all power-set combinations of the inputs.
 
 \subsection{Information missing in FTA}
 
-to expand: Each FTA deals only with one symptom.
+to expand: Each FTA deals only with one symptom. - therefore only one cut-set is represented by each FTA
+diagram, throwing away nearly all the information associated with the other top level events.
 
 \subsubsection{Further refinements}
 
-to expand: Cuts sets and minimal cut sets.
+to expand: Cuts sets and minimal cut sets. show example of detection of mimimal cut sets in the FTA tree
 
 
 \clearpage