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%\title{Electronic Component Failure Analysis}
%\author{R.P. Clark ~ Energy Technology Control}
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\begin{abstract}
This chapter describes the analysis of electrical components in terms of their operational and failure modes.
When analysed a component can be represented by a set of `fault modes'. 
The fault modes can be considered as logical states for the component.
These can be represented as 
logical states (respresented as contours) in a `propositional logic diagram'.
Components can then be combined by bringing the contours from 
several components onto the same diagram.
Logical analysis of how the failure modes of the components interact 
in a sub-system or module, can now be undertaken.
\end{abstract}
%
\section{Introduction}

Every component in a electrical circuit may fail in several ways.
The most obvious ways for them to fail are that legs of the 
circuit become disconnected or are shorted.

Components may fail internally. Some may have failure modes due to environmentalfactors.
% SPACE SOLDER EVAPORATING
% TEMPERATURE EFFECTS SUCH AS INACCURACY, LEAKAGE OF CURRENT ETC

Each component thus has a set of possible failure modes.
Looking at this independently of cause, we can in the worst case
consider that any of these errors could occur at any time.

In analysing a circuit we should look take into consideration
all possible failure modes, and where appropriate, how
these failure modes will affect other components in the circuit.

Safety analysis of components forming critical circuitry, 
is currently performed using scenario based test cases\cite{EN298}, % \cite{gastec}, \cite{tuv}.
These involve experts checking a circuit for failure modes on a circuit and how these will
affect the system, based on their expertise.
Because this is a human process,
this means that unlikely or very rare test cases may not be considered, but also
that some test cases may be missed.
By taking all possible failure modes and laying these out in a logic diagram, 
a computer can check that an analysis entry has been made for all
failure mode combinations deemed possible in the diagram.

This paper is concerned with the analysis phase that takes a component
and from it produces a set of failure modes. PLD diagram configurations
will be dealt with in the chapter \ref{pldconfig}.


\section{A resistor}

A resistor is a simple component, and according to MIL1991 has two failure modes OPEN and SHORT.
Let us consider what can happen to a resistor soldered onto a PCB.
It could become de-soldered at one pin or the other. The effect would be the same. The resistor would appear to
be OPEN circuit.This again would create an OPEN circuit.
 It could become shorted by some foreign material, or in the production soldering process.
This again would have the same effect. It would appear to be a SHORT circuit.
It could be overstressed and burnt out, (by the application of an out of spec current for instance).
Resistors typically can drift in value with temperature. For someapplications this may not be important.
The manufacturers data-sheet will describe the temperature drift co-effecients and operating ranges.

We can represent our resistor then to be in four operational states, $R_s = \{ OK, OPEN, SHORT, T\_DRIFT \}$.
Because we are interested in failure analysis we assume that every component has an OK state
but this is not of interest. When every component on a board is in the $OK$ state 
the sub-system will function correctly.
We are interested in failures and how that affects the sub-system, so we 
can ignore the $OK$ state and represent our resistor thus for the purpose of fault analysis.

 $$R_s = \{ OPEN, SHORT, T\_DRIFT \}$$


This can be represented in a PLD thus 
 IMAGE HERE

\section{ PNP Transistor }

Each leg open : each leg shorted all combinations.
Dud no HFE.
TEMPERATURE, operating range
{ \huge Look in MIL 1991}
Resultant failure modes ==

\section { IR Photo-diode}


each leg open, each leg shorted combination.
NO effect or always on.

Resultant failure modes ==


% \section{On / Off Switch}

% A simple on / off switch can fail in two ways again, OPEN or SHORT.


% 
% \begin{figure}
%  \centering
%  \includegraphics[scale=0.4]{components_as_plds/ir_det.eps}
%  % ir_det.eps: 0x0 pixel, 300dpi, 0.00x0.00 cm, bb=0 0 582 304
%  \caption{IR detector circuit}
%  \label{fig:irdet}
% \end{figure}
% 
% 
% \section { Sample circuit : An Infra Red Detector }
% 
% This circuit for discussion is for a infra-red detector (see figure \ref{fig:ir_det}).
% It simply draws current through the PNP resistor when infra-red light falls onto the detector.
% When IR light is detected at the detector, TR1 (IR photo transistor) turns on, lowering the voltage at the base of TR2.
% This turns on TR2 which raise the voltage at the collector of TR2.
% A high voltage at the collector of TR2 thus indicates the presence of IR light on the detector.
% This could be connected to a visible LED or a micro-processor.
% For the purpose of discussion we are only interested in the detection part of this circuit.
% By analysing the failure modes for all its components
% we can can combine the failure modes for all the parts,
% and analyse how these failures affect the detector.
% We can also look at how the diagrams can help in the analysis
% phase.
% 
% \subsection { IR detector in use }
% 
% In use the IR photo transistor would be mounted on a probe,  used to detect IR.
% The user would switch the detector on, check that the ON LED was lit,
% and then use the probe. On detection of IR at the probe the IR detect LED will light.
% This is a real circuit and has been used for debugging 
% and validating IR position detection circuitry.
% 
% %\bibliography{vmgbibliography,mybib}
% %Typeset in \ \ {\huge \LaTeX} \ \ on \ \  \today 
% %\section{}
% %\end{document}
% 
% \subsection{ Components and Fault Modes }
% 
% Below is a list of the failure modes that can occur in the 
% circuit above. A detailed discussion on determing the possible fault modes
% for components are given in chapter \ref{chapfaultdet}.
% Failure modes here have been determeined from the MIL 1991\ref{MIL1991} handbook.
% 
% \begin{itemize}
% \item TR1 = \{ OPEN\_CE, SHORT\_CE \}
% \item TR2 = \{ OPEN\_CE, SHORT\_CE, SHORT\_BE  SHORT\_BC\}
% \item R1 = \{ OPEN\_R, SHORT\_R \}
% \item R2 = \{ OPEN\_R, SHORT\_R \}
% \item D1 = \{ OPEN\_D, SHORT\_D \}
% \item D2 = \{ OPEN\_D, SHORT\_D \}
% \item B1 = \{ OPEN\_B, FLAT\_B \}
% \item SW1 = \{ ALWAYSOPEN\_SW1, ALWAYSCLOSED\_SW1 \}
% \end{itemize}
% 
% With this information we can now begin to analyse the circuit.
% Firstly we can look at the overall effect of any one component 
% on the rest of the circuit. After that we can look at combinations
% of component failure modes.
% 
% \subsection{FMEA : Failure Mode Effcets Analysis}
% 
